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Automated Post-Processing of DRC Errors Improves Debugging Productivity

Automated Post-Processing of DRC Errors Improves Debugging Productivity

Learn how to quickly and accurately analyze and fix (or waive) a wide range of complex error conditions with automated post-processing DRC debugging flows.


Multicore System Management FAQs

Multicore System Management FAQs

This white paper addresses the most frequently asked questions developers have when choosing how to control and manage a multicore system.


Embedded Analytics: A Platform Approach

Embedded Analytics: A Platform Approach

This paper outlines the multi-dimensional nature of this complexity and the costs and opportunities it generates. It also demonstrates that the key to designers meeting this challenge is the ability to attain system-level visibility: both during the semiconductor development cycle, and subsequently after embedded systems are deployed in the field.


Critical Area Based Test Pattern Optimization

Critical Area Based Test Pattern Optimization

Among the challenges for design-for-test (DFT) engineers is how to set a target metric for automatic test pattern generation (ATPG) and how to choose the best set of patterns. Traditional coverage targets based on the number of faults detected don’t consider the likelihood of one fault occurring compared to another.


Streaming Scan Network: A No-Compromise Approach to DFT

Streaming Scan Network: A No-Compromise Approach to DFT

This white paper describes the basic components of the Tessent Streaming Scan Network (SSN), a technology designed to decouple core level and chip level DFT requirements. With SSN, DFT engineers can for the first time implement DFT using a true, effective bottom-up flow, not having to make trade-offs between implementation effort and manufacturing test cost.


Mitigating Risks in Automotive IP and SoC with Safety Mechanisms

Mitigating Risks in Automotive IP and SoC with Safety Mechanisms

This white paper discusses faults and detectability by a safety mechanism, safety mechanism types and attributes, and how safety mechanism effectiveness is evaluated.


How to Ensure Quality Data That Enables Autonomous Driving

How to Ensure Quality Data That Enables Autonomous Driving

Explore how data analyses are being accelerated for autonomous vehicles.


Flexible USB4-based Interface IP Solution for AI at the Edge

Flexible USB4-based Interface IP Solution for AI at the Edge

This white paper describes a flexible USB4-based IP solution for edge AI accelerators and SoCs. The IP solution can be used with multiple types of hosts by supporting legacy PCIe 4.0, USB4, USB 3.x, and USB 2.0 connections.