Latest ASICs Industry White Papers

Reducing IR and EM Issues With Automated Via Insertion

This paper shows how manufacturing requirements can be leveraged to perform automated insertion of DRC/LVS-clean vias.

Critical Area Based Test Pattern Optimization

Among the challenges for design-for-test (DFT) engineers is how to set a target metric for automatic test pattern generation (ATPG) and how to choose the best set of patterns. Traditional coverage targets based on the number of faults detected don’t consider the likelihood of one fault occurring compared to another.

Streaming Scan Network: A No-Compromise Approach to DFT

This white paper describes the basic components of the Tessent Streaming Scan Network (SSN), a technology designed to decouple core level and chip level DFT requirements. With SSN, DFT engineers can for the first time implement DFT using a true, effective bottom-up flow, not having to make trade-offs between implementation effort and manufacturing test cost.

Siemens, AMD, and Microsoft Collaborate on EDA In the Cloud

This white paper demonstrates how using a production 7nm design, AMD achieved a 2.5X speed up in physical verification cycle time.

Mitigating Risks in Automotive IP and SoC with Safety Mechanisms

This white paper discusses faults and detectability by a safety mechanism, safety mechanism types and attributes, and how safety mechanism effectiveness is evaluated.

Rethinking Applications Processing for Ultra-Low Power - i.MX 7ULP

This white paper discusses how NXP was able to reduce power without severely compromising features and performance dramatically. It also provides a closer look at how the i.MX 7ULP applications processor brings the benefits of a rich OS to battery-powered devices.

Flexible USB4-based Interface IP Solution for AI at the Edge

This white paper describes a flexible USB4-based IP solution for edge AI accelerators and SoCs. The IP solution can be used with multiple types of hosts by supporting legacy PCIe 4.0, USB4, USB 3.x, and USB 2.0 connections.

Mentor, AMD, and Microsoft Collaborate on EDA in the Cloud

Moving some or all of your electronic design automation (EDA) computing to the cloud enables your company to reduce time-to-market and innovate faster, simply by taking advantage of flexible resources and economies of scale.

Spartan-7 SP701 FPGA Evaluation Kit Demonstration Project

Developing cost-effective industrial image processing systems requires high-performance cameras and flexible image-processing systems capable of adaption.

Source Control, Git, and Industrial Automation

Source control systems have become ubiquitous in the IT world but have not become a major component of operational technology (in particular, PLC programming). There is an increasing, popular movement in the industrial controls world to bring modern source control systems to PLC programming.

Jitter Budgeting for Clock Distribution Networks in High-Speed PHYs and SerDes

High speed PHYs, such as industry’s recent DDR5/LPDDR5 operating at 6400 Mbps and high-speed SerDes, heavily rely on on-die clock distribution networks for clock and data transmission.

Addressing the Evolving Technology Needs of Cloud Data Centers with IP

The advent of cloud computing nearly 20 years ago has led to a steady migration of computational resources from corporate data centers to the cloud.

Accelerate Time to Market with Calibre nmLVS Recon Technology: A New Paradigm for Circuit Verification

One thing is clear — tapeouts are getting harder and taking longer. According to statistics from industry conference surveys, at least 50% of scheduled tapeouts slip each year.

Net Common Resistance Extraction is Crucial to Design Reliability

Accurately extracting and calculating the common resistance of interconnects within analog IC designs is fundamental for evaluating circuit reliability, particularly for noise and voltage drop analysis and ESD protection verification.

Optimizing the Integration of DFM and P&R

Design companies and foundries are constantly modifying their design implementation flow to deliver the best possible solution for their operational needs and the best possible designs for the market.

Improving Productivity With More Efficient LVS Debug

Layout versus schematic (LVS) verification is an essential and integral part of integrated circuit (IC) verification in a system-on-chip (SoC) design cycle, but with today’s highly dense and hierarchical layouts, increasing circuit complexity, and intricate foundry rules, running LVS can be a time-consuming and resource-intensive endeavor.

How to Successfully Calibrate an Open-Loop DAC Signal Chain

The monitoring and testing of a DAC signal chain are critical considerations for open-loop applications. Errors in a DAC signal chain, including DAC intrinsic errors that vary depending on the system, can significantly disrupt the customer design-in experience.

Power-Up Phase Determinism Using Multichip Synchronization Features in Integrated Wideband DACs and ADCs

The integration of multiple digital signal processing (DSP) blocks, wideband digital-to-analog converters (DACs), and wideband analog-to-digital converters (ADCs) within a single monolithic chip are enabling the offloading of FPGA resources.

Power-Up Phase Determinism Using Multichip Synchronization Features in Integrated Wideband DACs and ADCs

Fast and Easy Evaluation of GaN’s High-Frequency Capabilities

This application note explains how to set up and use the CoolGaNTM Integrated Power Stage (IPS) half-bridge evaluation board featuring Infineon’s 600 V IGI60F1414A1L chipset.

Paralleling Power MOSFETs in High Current Applications

This application note highlights the MOSFET parameters playing an important role in current sharing. It also quantifies the additional power loss incurred in a MOSFET carrying more current due to the current sharing imbalance.

Paralleling MOSFETs in High-Current LV Drive Applications

This application note outlines the influences on the current balancing and provides a closer look at the switching behavior of a MOSFET as well as circuit definition for simulation and PCB.

Reliability of SiC Trench Based Power MOSFETs

This white paper provides a tutorial on the major steps required for a successful release of highly reliable SiC based products.

A Painless Solution for Analog Verification Management

This white paper outlines how to simplify the analog management process by rolling all the tasks into a single tool that also enables the visualization of results in spreadsheets.

Eaton’s Semi-Shielded Inductors are the Deal Solution for Industry 4.0 and Beyond

This use case covers topics such as addressing electromagnetic interference (EMI) and noise due to high-frequency switching and changes in current or voltage levels. It also describes why Eaton’s semi-shielded inductors are the ideal solution for Industry 4.0 and beyond.

Semi-shielded Power Inductors Provide Great Value and High Performance in Consumer Applications

This use case from Eaton describes how semi-shielded power inductors provide great value and high performance for consumer applications. The resource provides a detailed look at technical challenges in consumer electronics and explains why Eaton inductors are a great solution for consumer applications.

IoT Regulatory Compliance

Discover deep insights into regulatory compliance tests, why it is important, its test challenges, and the solutions to overcome these obstacles.

Reducing IR and EM Issues With Automated Via Insertion

This paper shows how manufacturing requirements can be leveraged to perform automated insertion of DRC/LVS-clean vias.

Why a Fully Integrated Translation Loop Device Achieves the Best Phase Noise Performance

This white paper reviews several methods for low-phase noise signal generation. It provides a demonstration of the advantages and disadvantages of these methods and introduces the translation loop device, which takes the best of all frequency generation methods without their complexity to enable ultralow phase noise signal generation.

Battery Stack Monitor Maximizes Performance of Li-Ion Batteries in Hybrid and Electric Vehicles

This white paper explores the ways a battery stack monitor can maximize performance of Li-Ion batteries in hybrid and electric vehicles.

A²B® and Ethernet in Automotive Applications: What, When, and How

This white paper provides a detailed description of Automotive Audio Bus (A² B) and compares A² B to the use of ethernet in automotive applications.

CTSD Precision ADCs: CTSD Architecture Explained for Signal Chain Designers

Explore this step-by-step approach to building a CTSD modulator loop starting with the widely known closed-loop inverting amplifier configuration and combining it with an ADC and a DAC.

Improving Power Supply Design Using Semi-Automation—Five Steps to Quick and Efficient Design

Explore semi-automated design tools through five critical steps of the power supply design process.

Ultralow Noise, High Current, Compact DC-to-DC Converter Solution for Signal and Data Processing Circuits

Learn about ultralow noise, high current, compact DC-to-DC converter solution for signal, and data processing circuits in this white paper from Analog Devices.

LIDAR for Autonomous System Design: Object Classification or Object Detection?

Understand the design requirements for object detection and classification to help achieve a safe and cost-effective solution for autonomous vehicles.

How to Design a Better Pulse Oximeter

Learn the fundamentals of SpO₂ measurement and how a new generation of optical analog front ends (AFEs) can help create a better oximeter.

Verification Methods of Snubber Circuits in Flyback Converters

Explore verification methods during the design phase of snubber circuits in flyback converters.

Topologies in On-Board Charging: Semiconductor Recommendations for Reliable Charging Solutions

In this whitepaper from Infineon Technologies, learn about the system architecture and possible topologies for on-board charging, as well as the recommendations for the right choice of power semiconductors for OBCs. This whitepaper will take a more in-depth look into onboard charging, discuss the system architecture, and elaborate on the possible topologies for the PFC and the DC-DC stages.

Cosmic Radiation Effects on High-Voltage Semiconductors in Automotive Onboard Chargers

This application note explains the effect of cosmic radiation on HV power semiconductors, describes the influencing factors of the application on the failure rate, and gives concrete results of robustness validation based on a generic mission profile for a bi-directional onboard-charger (OBC).