Or try an example search: AES128
Introduction The aim of the OpenRISC project is to create a free, open source computing platform available under the GNU (L)GPL license. Platform…
Overview This article describe the PCI express card with Xilinx Spartan 6 that i have made. The download section contains test applications in…
Introduction: From my thesis: Low-Density Parity Check (LDPC) coding is a form of error coding introduced by Gallager that can achieve performance…
Synopsis Hey, this project has been downloaded many, *many* times it would seem. I'm glad you've found it useful. I would be interested in…
A 32-bit parallel and highly pipelined Cyclic Redundancy Code (CRC) generator is presented. The design can handle 5 different channels at an input…
RTL Verilog code to perform Two Dimensional Fast Hartley Transform (2D-FHT) for 8x8 points. Presented algorithm is FHT with decimation in frequency…
n/a
This is a behavioral module for parallel scrambler/descrambler. There are RTL scrambler modules available, the purpose of this project is to built…
The CORDIC algorithm is an iterative algorithm to evaluate many mathematical functions, such as trigonometrically functions, hyperbolic functions…
Streaming atan function based on CORDIC algorithm. [angle, modulus] = cordic([I, Q]) angle = atan(Q/I) modulus = sqrt(I^2+Q^2) angle in range…
Arithmetic core originally created by: Cesar, Julio Fernandes, Felipe //// CRCAHB CORE BLOCK This file is part of the APB to I2C project…
Free and open source double precision Floating Point Unit (FPU). The openFPU64 currently features: - double precision - Addition/Subtraction -…
Features - The unit is designed to be synchronous to one global clock. All registers are updated on the rising edge of the clock. - All registers…
07/06/2019 - Updated the square root core to allow restarting the calculation any time load is active. 06/14/2019 - Updates have been made to…
Quadratic_func is a fully pipelined quadratic polynomial that computes the relation y = ax^2 + bx + c. On each rising-edge of the clock (when en is…
The Elliptic Curve Group core is for computing the addition of two elements in the elliptic curve group, and the addition of $c$ identical elements…
This project was started in order to create fixed point (Q format) arithmetic modules in verilog. What was created was a parameterized (specify…
VHDL implementation of a fast space- and resource-efficient logarithm approximation unit for FPGAs. The unit is an implementation of the ICSILog…
VHDL project for a Square Root Unit (SRU) for 32-bit fixed point data. The unit implements the Goldschmidt recursion algorithm. It is pipelined…
The Gaussian Noise Generator core generates white Gaussian noise of standard normal distribution, which can be used to measure BER to extremely low…
Facebook
Google
GitHub
Linkedin
