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Latest RISC-V Industry White Papers

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Virtual PCIe Delivers a “Shift Left” in Software Defined Networking Emulation

Virtual PCIe Delivers a “Shift Left” in Software Defined Networking Emulation

Explore how VirtuaLAB PCIe and Ethernet Virtual Machines (VM) work together, how they compete for host resources and how VMs address the big device management channel requirements for HW and SW co-verification in Veloce emulation.


End-to-End Vehicle Verification

End-to-End Vehicle Verification

This paper describes how a PreScan, Veloce, and AMEsim tool flow provides the thoroughness of verification to get new cars on the road quickly, efficiently, and safely.


Increase Hardware Emulation Productivity with Virtual Mode Share

Increase Hardware Emulation Productivity with Virtual Mode Share

Explore the advantages and benefits of Veloce VirtuaLAB emulation, backed up by three test cases.


Veloce Delivers Best of ICE and Virtual Emulation to the SSD Storage Market

Veloce Delivers Best of ICE and Virtual Emulation to the SSD Storage Market

This white paper discusses the changes in storage technology and why SSD design teams need a complementary tool kit using ICE, the Veloce Deterministic ICE App, and VirtuaLAB.


The Veloce Strato Platform: Unique Core Components Create High Value Advantages

The Veloce Strato Platform: Unique Core Components Create High Value Advantages

Explore how the Veloce® Strato emulation platform chip, operating system software, and hardware work together to enhance verification productivity.


Automated ESD Protection Verification for 2.5D and 3D ICs

Automated ESD Protection Verification for 2.5D and 3D ICs

Take a look at verification challenges and walk through a proven automated ESD verification methodology for 2.5D and 3D ICs.


Automated Post-Processing of DRC Errors Improves Debugging Productivity

Automated Post-Processing of DRC Errors Improves Debugging Productivity

Learn how to quickly and accurately analyze and fix (or waive) a wide range of complex error conditions with automated post-processing DRC debugging flows.


Ensuring the Success of Your RISC-V Product With a Commercial-Grade Software Development Ecosystem

Ensuring the Success of Your RISC-V Product With a Commercial-Grade Software Development Ecosystem

This white paper takes a detailed look at the History of RISC-V, RISC-V Benefits, the RISC-V Architecture, toolchain Considerations for RISC-V-based commercial products, and sample Commercial-grade RISC-V SDKs.


How to Ensure Quality Data That Enables Autonomous Driving

How to Ensure Quality Data That Enables Autonomous Driving

Explore how data analyses are being accelerated for autonomous vehicles.


Solve Tough Challenges with the Right Products

Solve Tough Challenges with the Right Products