Some engineers believe that the 2D design is no longer sufficient for today’s complicated PCB layouts. Flex and rigid-flex designs, and an increasing need for…
Some engineers believe that the 2D design is no longer sufficient for today’s complicated PCB layouts. Flex and rigid-flex designs, and an increasing need for collaboration with MCAD, require advanced 3D layout design capabilities to address today’s challenges fully.
A new metric for SerDes channel and package characterization is emerging. Effective Return Loss (ERL) is replacing the…
A new metric for SerDes channel and package characterization is emerging. Effective Return Loss (ERL) is replacing the traditional frequency-domain Return Loss (RL) metric as a more effective means of characterizing SerDes channels.
Identifying the right medical solutions for imaging, diagnostics, and clinical equipment is not easy. The growing needs…
Identifying the right medical solutions for imaging, diagnostics, and clinical equipment is not easy. The growing needs of scalable healthcare platforms with heterogeneous multi-processing, I/O flexibility, hardware-based deterministic controls, and comprehensive solutions in healthcare artificial intelligence (AI), medical imaging, and safety & security add quite a bit of complexity to the decision process.
One thing is clear — tapeouts are getting harder and taking longer. According to statistics from industry conference…
One thing is clear — tapeouts are getting harder and taking longer. According to statistics from industry conference surveys, at least 50% of scheduled tapeouts slip each year.
Accurately extracting and calculating the common resistance of interconnects within analog IC designs is fundamental for…
Accurately extracting and calculating the common resistance of interconnects within analog IC designs is fundamental for evaluating circuit reliability, particularly for noise and voltage drop analysis and ESD protection verification.
Layout versus schematic (LVS) verification is an essential and integral part of integrated circuit (IC) verification in a…
Layout versus schematic (LVS) verification is an essential and integral part of integrated circuit (IC) verification in a system-on-chip (SoC) design cycle, but with today’s highly dense and hierarchical layouts, increasing circuit complexity, and intricate foundry rules, running LVS can be a time-consuming and resource-intensive endeavor.
The monitoring and testing of a DAC signal chain are critical considerations for open-loop applications. Errors in a DAC…
The monitoring and testing of a DAC signal chain are critical considerations for open-loop applications. Errors in a DAC signal chain, including DAC intrinsic errors that vary depending on the system, can significantly disrupt the customer design-in experience.
Whether used for a process control installation or an industrial automation system, an I/O module (or a field junction…
Whether used for a process control installation or an industrial automation system, an I/O module (or a field junction box) poses a host of unique challenges in a product's life cycle. Product management, for example, faces key decisions on how many channels and which combinations will be necessary for each product.
The electronic industry’s dynamics are rapidly evolving, and there is less time to build and prototype analog circuits…
The electronic industry’s dynamics are rapidly evolving, and there is less time to build and prototype analog circuits to verify their functionality as the control of research and development (R&D) budgets and time to market (TTM) have become more challenging.
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