This white paper explores the journey of understanding how to meet quality requirements and accelerate time-to-market for your company’s latest flagship high performance computing (HPC) artificial intelligence (AI)-enabled system-on-chip (SoC) design.
March 01, 2022 by Siemens Digital Industries Software
Explore how VirtuaLAB PCIe and Ethernet Virtual Machines (VM) work together, how they compete for host resources and how VMs address the big device management channel requirements for HW and SW co-verification in Veloce emulation.
October 29, 2021 by Siemens Digital Industries Software
This white paper discusses the changes in storage technology and why SSD design teams need a complementary tool kit using ICE, the Veloce Deterministic ICE App, and VirtuaLAB.
October 29, 2021 by Siemens Digital Industries Software
This white paper discusses how SoC verification teams can achieve higher capacity than the desktop prototype and reduce the overall cost of ownership of their hardware verification resources even as it helps to accelerate the verification cycle.
October 29, 2021 by Siemens Digital Industries Software
This white paper from Siemens Digital Industries Software demonstrates how running Calibre PERC verification flows on cloud hardware resources to satisfy peak demand usage can increase productivity and expedite turnaround times.
October 20, 2021 by Siemens Digital Industries Software
This white paper displays how the Tanner flow simplifies the design and verification process of Analog/Mixed-Signal design. It also describes how the user can verify design functionality, connectivity, and performance at all levels of the design hierarchy and for all integrated circuit (IC) applications.
August 12, 2021 by Siemens Digital Industries Software
This white paper walks through the design and review of a wiring harness for a small tractor using VeSys. Solutions like the one discussed in this resource allow vehicle manufacturers to meet the demands of product complexity and quality while going to market faster than ever.
August 05, 2021 by Siemens Digital Industries Software
In this white paper, the reader will learn how the Calibre tools provide enhanced verification and fill optimization that can drastically reduce the number of simulations required. It also discusses how the tools achieve the aforementioned while still ensuring designs will perform reliably in conformance with their design specifications over the lifetime of the products in which they are used.
August 03, 2021 by Siemens Digital Industries Software
Among the challenges for design-for-test (DFT) engineers is how to set a target metric for automatic test pattern generation (ATPG) and how to choose the best set of patterns. Traditional coverage targets based on the number of faults detected don’t consider the likelihood of one fault occurring compared to another.
June 17, 2021 by Siemens Digital Industries Software