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Streaming Scan Network: A No-Compromise Approach to DFT

Streaming Scan Network: A No-Compromise Approach to DFT

This white paper describes the basic components of the Tessent Streaming Scan Network (SSN), a technology designed to decouple core level and chip level DFT requirements. With SSN, DFT engineers can for the first time implement DFT using a true, effective bottom-up flow, not having to make trade-offs between implementation effort and manufacturing test cost.


Mitigating Risks in Automotive IP and SoC with Safety Mechanisms

Mitigating Risks in Automotive IP and SoC with Safety Mechanisms

This white paper discusses faults and detectability by a safety mechanism, safety mechanism types and attributes, and how safety mechanism effectiveness is evaluated.


How to Ensure Quality Data That Enables Autonomous Driving

How to Ensure Quality Data That Enables Autonomous Driving

Explore how data analyses are being accelerated for autonomous vehicles.


Computer-on-Module for High Performance Computing

Computer-on-Module for High Performance Computing

Learn how the long-established COM Express standard for Computer-on-Modules (COM) has been combined with a new high-performance computing standard.


Flexible USB4-based Interface IP Solution for AI at the Edge

Flexible USB4-based Interface IP Solution for AI at the Edge

This white paper describes a flexible USB4-based IP solution for edge AI accelerators and SoCs. The IP solution can be used with multiple types of hosts by supporting legacy PCIe 4.0, USB4, USB 3.x, and USB 2.0 connections.


Source Control, Git, and Industrial Automation

Source Control, Git, and Industrial Automation

Source control systems have become ubiquitous in the IT world but have not become a major component of operational technology (in particular, PLC programming). There is an increasing, popular movement in the industrial controls world to bring modern source control systems to PLC programming.


Accelerate Time to Market with Calibre nmLVS Recon Technology: A New Paradigm for Circuit Verification

Accelerate Time to Market with Calibre nmLVS Recon Technology: A New Paradigm for Circuit Verification

One thing is clear — tapeouts are getting harder and taking longer. According to statistics from industry conference surveys, at least 50% of scheduled tapeouts slip each year.


Net Common Resistance Extraction is Crucial to Design Reliability

Net Common Resistance Extraction is Crucial to Design Reliability

Accurately extracting and calculating the common resistance of interconnects within analog IC designs is fundamental for evaluating circuit reliability, particularly for noise and voltage drop analysis and ESD protection verification.


Optimizing the Integration of DFM and P&R

Optimizing the Integration of DFM and P&R

Design companies and foundries are constantly modifying their design implementation flow to deliver the best possible solution for their operational needs and the best possible designs for the market.


Improving Productivity With More Efficient LVS Debug

Improving Productivity With More Efficient LVS Debug

Layout versus schematic (LVS) verification is an essential and integral part of integrated circuit (IC) verification in a system-on-chip (SoC) design cycle, but with today’s highly dense and hierarchical layouts, increasing circuit complexity, and intricate foundry rules, running LVS can be a time-consuming and resource-intensive endeavor.


Accelerate Early Design Exploration and Verification for Faster Time to Market

Accelerate Early Design Exploration and Verification for Faster Time to Market

Early chip-level physical verification faces many challenges. The Calibre™ Recon tool enables design teams to perform analysis and physical verification of full-chip design layouts during the very early stages of the design cycle, while the different components are still immature.


How to Successfully Calibrate an Open-Loop DAC Signal Chain

How to Successfully Calibrate an Open-Loop DAC Signal Chain

The monitoring and testing of a DAC signal chain are critical considerations for open-loop applications. Errors in a DAC signal chain, including DAC intrinsic errors that vary depending on the system, can significantly disrupt the customer design-in experience.


5G is Born - Infographic

5G is Born - Infographic

5G capabilities cover many different applications, standards, and capabilities. Enhanced mobile broadband (eMBB), massive machine type communications (mMTC), and ultra-reliable low latency communications (URLLC) all contribute to the extended coverage and never-before-seen reliability with unparalleled accessibility.


Power-Up Phase Determinism Using Multichip Synchronization Features in Integrated Wideband DACs and ADCs

Power-Up Phase Determinism Using Multichip Synchronization Features in Integrated Wideband DACs and ADCs

The integration of multiple digital signal processing (DSP) blocks, wideband digital-to-analog converters (DACs), and wideband analog-to-digital converters (ADCs) within a single monolithic chip are enabling the offloading of FPGA resources.


Choosing the Most Suitable Predictive Maintenance Sensor

Choosing the Most Suitable Predictive Maintenance Sensor

Condition-based monitoring (CbM) involves monitoring of machines or assets using sensors to measure the current state of health.


A Step-by-Step Guide for Creating Signed Secure Bootable VxWorks 7 UEFI Boot Loader and Signed Final Images

A Step-by-Step Guide for Creating Signed Secure Bootable VxWorks 7 UEFI Boot Loader and Signed Final Images

In an era where security is paramount in many systems, it is intrinsic for users to be able to boot and load software that is guaranteed to be as secure by using a trust-based mechanism.


Is an RTC Module Timing Solution Right for Your Project?

Is an RTC Module Timing Solution Right for Your Project?

Timing solutions are critical to today’s electronics. Many engineers rely on the internal real-time clock (RTC) functionality that comes embedded in microcontroller units (MCUs) and system on chips (SoCs).


Why MEMS Accelerometers Are Becoming the Designer’s Best Choice for CbM Applications

Why MEMS Accelerometers Are Becoming the Designer’s Best Choice for CbM Applications

The global condition-based monitoring (CbM) market has experienced significant growth over the past few years, and it will likely only continue to grow in the near future. This growth coincides with the rapid advancement of MEMS accelerometers for use in vibration sensing applications, now rivaling the once-dominant piezoelectric (or PZT) accelerometer. 


From IoT Factories to Operating Rooms: How to Design Better Comms Systems

From IoT Factories to Operating Rooms: How to Design Better Comms Systems

While a factory floor and a medical operating theater share little in common, the equipment used in both areas must deliver trusted and precise operation, which is often mission critical. With the need for smarter systems, more data, and higher fidelity, bandwidth requirements are increasing.


A Modern Solution to Evolving Smoke Safety Regulations

A Modern Solution to Evolving Smoke Safety Regulations

This whitepaper presents the new regulations governing smoke alarms, and it describes how ADI's smoke detection module is designed and tested to meet the new UL-217 8th Ed.