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Engineering Essentials: The PCBA Design Handbook

Engineering Essentials: The PCBA Design Handbook

Download this comprehensive guide to mastering PCBA design techniques.


Checklist: Step-by-Step Guide to PCBA Production

Checklist: Step-by-Step Guide to PCBA Production

Convert your electronic design into a production-ready product with ease using this checklist by MacroFab.


Introduction to 1200 V SiC MOSFET Modules for On-Board Charger Applications

Introduction to 1200 V SiC MOSFET Modules for On-Board Charger Applications

Learn how to take advantage of SiC MOSFETs to enhance your OBC system and get guidance for adopting and transitioning to the SiC technology.


Using Physical and Scalable Simulation Models to Evaluate Parameters and Application Results

Using Physical and Scalable Simulation Models to Evaluate Parameters and Application Results

Learn how physical and scalable models can help a designer analyze components characteristics and optimize application performances.


Deliver 3D IC Innovations Faster

Deliver 3D IC Innovations Faster

Heterogeneous IC integration is an inflection point that’s not only bringing new architectures into the market but also disrupting the engineering process. How Siemens 3D IC helps you engineer a smarter future faster.


System-level Connectivity Management and Verification of 3D IC Heterogeneous Assemblies

System-level Connectivity Management and Verification of 3D IC Heterogeneous Assemblies

Capturing the intended system-level connectivity in a multi-substrate 3D IC assembly can be a challenge. This is especially true when each substrate is built using a different methodology, team, and/or format.


Shorten the time between P&R and physical verification with Calibre PVReady filler cell solution

Shorten the time between P&R and physical verification with Calibre PVReady filler cell solution

Ensure correct-by-construction filler cell insertion in less time, while using standard industry interfaces that seamlessly integrate with both the P&R and physical verification tools.


Veloce ProFPGA Increases Design Efficiency and Brings SoCs to Market Faster

Veloce ProFPGA Increases Design Efficiency and Brings SoCs to Market Faster

In this white paper, the Siemens EDA tool provides a modular, scalable desktop prototyping platform for early software development.


Veloce prototyping solutions accelerate verification of HPC AI-enabled SoCs

Veloce prototyping solutions accelerate verification of HPC AI-enabled SoCs

This white paper explores the journey of understanding how to meet quality requirements and accelerate time-to-market for your company’s latest flagship high performance computing (HPC) artificial intelligence (AI)-enabled system-on-chip (SoC) design.


IROC Technologies Tapes Out Aerospace SoC with Aprisa Place-and-Route

IROC Technologies Tapes Out Aerospace SoC with Aprisa Place-and-Route

In this case study, learn how the Aprisa software was able to implement a powerful and flexible RTL-GDSII design flow that was easy to use, fast, technology ready, and with excellent correlation with sign-off to reduce iterations.


Verification and Validation Bring the Design of Future Cars to the Present Day

Verification and Validation Bring the Design of Future Cars to the Present Day

This white paper discusses how verification and validation bring the design of future cars to the present day.


5G SoCs Demand New Verification Approaches

5G SoCs Demand New Verification Approaches

Learn how to create a new verification flow that combines emulation and X STEP, a platform that can generate, capture, and analyze bit-accurate fronthaul traffic.


Virtual PCIe Delivers a “Shift Left” in Software Defined Networking Emulation

Virtual PCIe Delivers a “Shift Left” in Software Defined Networking Emulation

Explore how VirtuaLAB PCIe and Ethernet Virtual Machines (VM) work together, how they compete for host resources and how VMs address the big device management channel requirements for HW and SW co-verification in Veloce emulation.


End-to-End Vehicle Verification

End-to-End Vehicle Verification

This paper describes how a PreScan, Veloce, and AMEsim tool flow provides the thoroughness of verification to get new cars on the road quickly, efficiently, and safely.


Increase Hardware Emulation Productivity with Virtual Mode Share

Increase Hardware Emulation Productivity with Virtual Mode Share

Explore the advantages and benefits of Veloce VirtuaLAB emulation, backed up by three test cases.


Veloce Delivers Best of ICE and Virtual Emulation to the SSD Storage Market

Veloce Delivers Best of ICE and Virtual Emulation to the SSD Storage Market

This white paper discusses the changes in storage technology and why SSD design teams need a complementary tool kit using ICE, the Veloce Deterministic ICE App, and VirtuaLAB.


The Veloce Strato Platform: Unique Core Components Create High Value Advantages

The Veloce Strato Platform: Unique Core Components Create High Value Advantages

Explore how the Veloce® Strato emulation platform chip, operating system software, and hardware work together to enhance verification productivity.


Veloce Primo Completes a Full SoC Verification Landscape

Veloce Primo Completes a Full SoC Verification Landscape

This white paper discusses how SoC verification teams can achieve higher capacity than the desktop prototype and reduce the overall cost of ownership of their hardware verification resources even as it helps to accelerate the verification cycle.


SoC Verification and Validation on Day 1

SoC Verification and Validation on Day 1

Explore this unified software-enabled verification and validation environment that breaks the dependencies between hardware design groups and software developers.


Reliability Verification in the Cloud Delivers Significant Runtime Benefits

Reliability Verification in the Cloud Delivers Significant Runtime Benefits

This white paper from Siemens Digital Industries Software demonstrates how running Calibre PERC verification flows on cloud hardware resources to satisfy peak demand usage can increase productivity and expedite turnaround times.