Latest Embedded Software Industry White Papers

This white paper examines the benefits of using Xilinx-based SoC module solutions.

This white paper examines the benefits of using Xilinx-based SoC module solutions.

Learn how to increase innovation and drive growth by modernizing digital product delivery.

Learn how to increase innovation and drive growth by modernizing digital product delivery.

This white paper discusses how verification and validation bring the design of future cars to the present day.

This white paper discusses how verification and validation bring the design of future cars to the present day.

Learn how to create a new verification flow that combines emulation and X STEP, a platform that can generate, capture,…

Learn how to create a new verification flow that combines emulation and X STEP, a platform that can generate, capture, and analyze bit-accurate fronthaul traffic.

Explore how VirtuaLAB PCIe and Ethernet Virtual Machines (VM) work together, how they compete for host resources and how…

Explore how VirtuaLAB PCIe and Ethernet Virtual Machines (VM) work together, how they compete for host resources and how VMs address the big device management channel requirements for HW and SW co-verification in Veloce emulation.

This paper describes how a PreScan, Veloce, and AMEsim tool flow provides the thoroughness of verification to get new…

This paper describes how a PreScan, Veloce, and AMEsim tool flow provides the thoroughness of verification to get new cars on the road quickly, efficiently, and safely.

Explore the advantages and benefits of Veloce VirtuaLAB emulation, backed up by three test cases.

Explore the advantages and benefits of Veloce VirtuaLAB emulation, backed up by three test cases.

This white paper discusses the changes in storage technology and why SSD design teams need a complementary tool kit using…

This white paper discusses the changes in storage technology and why SSD design teams need a complementary tool kit using ICE, the Veloce Deterministic ICE App, and VirtuaLAB.

Explore how the Veloce® Strato emulation platform chip, operating system software, and hardware work together to enhance…

Explore how the Veloce® Strato emulation platform chip, operating system software, and hardware work together to enhance verification productivity.

This white paper discusses how SoC verification teams can achieve higher capacity than the desktop prototype and reduce…

This white paper discusses how SoC verification teams can achieve higher capacity than the desktop prototype and reduce the overall cost of ownership of their hardware verification resources even as it helps to accelerate the verification cycle.

This paper outlines the multi-dimensional nature of this complexity and the costs and opportunities it generates. It also…

This paper outlines the multi-dimensional nature of this complexity and the costs and opportunities it generates. It also demonstrates that the key to designers meeting this challenge is the ability to attain system-level visibility: both during the semiconductor development cycle, and subsequently after embedded systems are deployed in the field.

Discover deep insights into regulatory compliance tests, why it is important, its test challenges, and the solutions to…

Discover deep insights into regulatory compliance tests, why it is important, its test challenges, and the solutions to overcome these obstacles.

This paper shows how manufacturing requirements can be leveraged to perform automated insertion of DRC/LVS-clean vias.

This paper shows how manufacturing requirements can be leveraged to perform automated insertion of DRC/LVS-clean vias.

Building blocks of modern embedded systems, including processors, SoCs, system DRAM, non-volatile memories, sensors, and…

Building blocks of modern embedded systems, including processors, SoCs, system DRAM, non-volatile memories, sensors, and connectivity modules, have varied power requirements. On one extreme, a system power management IC (PMIC) integrates all or almost all of the required power rails. On the other hand, individual power rails are implemented using discrete dc/dc and LDOs.

Among the challenges for design-for-test (DFT) engineers is how to set a target metric for automatic test pattern…

Among the challenges for design-for-test (DFT) engineers is how to set a target metric for automatic test pattern generation (ATPG) and how to choose the best set of patterns. Traditional coverage targets based on the number of faults detected don’t consider the likelihood of one fault occurring compared to another.

Explore how data analyses are being accelerated for autonomous vehicles.

Explore how data analyses are being accelerated for autonomous vehicles.

Learn how the long-established COM Express standard for Computer-on-Modules (COM) has been combined with a new…

Learn how the long-established COM Express standard for Computer-on-Modules (COM) has been combined with a new high-performance computing standard.

This white paper describes a flexible USB4-based IP solution for edge AI accelerators and SoCs. The IP solution can be…

This white paper describes a flexible USB4-based IP solution for edge AI accelerators and SoCs. The IP solution can be used with multiple types of hosts by supporting legacy PCIe 4.0, USB4, USB 3.x, and USB 2.0 connections.

Source control systems have become ubiquitous in the IT world but have not become a major component of operational…

Source control systems have become ubiquitous in the IT world but have not become a major component of operational technology (in particular, PLC programming). There is an increasing, popular movement in the industrial controls world to bring modern source control systems to PLC programming.