At every point in the design process, RISC-V developers can make use of the advancements presented at RISC-V Summit Europe.
At every point in the design process, RISC-V developers can make use of the advancements presented at RISC-V Summit Europe.
RISC-V “is changing the way people build every single computer,” says Mark Himelstein, the former CTO at RISC-V…
RISC-V “is changing the way people build every single computer,” says Mark Himelstein, the former CTO at RISC-V International. He joins us to explain the significance of the RISC-V ISA, open standard development challenges, and read poetry.
Check out the technologies and products these leading companies plan to showcase at next week's Embedded World trade show…
Check out the technologies and products these leading companies plan to showcase at next week's Embedded World trade show in Nuremberg, Germany.
SiFive is helping lead the RISC-V revolution in automotive, Android, and AI. Senior VP Jack Kang joins the Moore’s…
SiFive is helping lead the RISC-V revolution in automotive, Android, and AI. Senior VP Jack Kang joins the Moore’s Lobby podcast to provide his insights on the success of SiFive and the open-standard RISC-V instruction set architecture (ISA).
While the rest of the world spent 2023 playing with ChatGPT, the electronics industry put AI into everything from…
While the rest of the world spent 2023 playing with ChatGPT, the electronics industry put AI into everything from processors to edge IoT chips to EDA tools.
Renesas has announced one of the first independently developed 32-bit RISC-V CPUs.
Renesas has announced one of the first independently developed 32-bit RISC-V CPUs.
Reporting a “banner year” for adoption, these RISC-V developments show the versatility of the ISA.
Reporting a “banner year” for adoption, these RISC-V developments show the versatility of the ISA.
At the 2023 North America RISC-V Summit, dozens of presenters will showcase RISC-V innovations in desktop computing and…
At the 2023 North America RISC-V Summit, dozens of presenters will showcase RISC-V innovations in desktop computing and wearable applications.
The latest RISC-V IP makes processing power customizable for a wide span of embedded applications.
The latest RISC-V IP makes processing power customizable for a wide span of embedded applications.
SiFive has released two new processors, one to target machine learning applications, and one to target general-purpose HPC.
SiFive has released two new processors, one to target machine learning applications, and one to target general-purpose HPC.
In this roundup, we review the ways RISC-V is making its mark in the computing world—from small-scale gaming projects…
In this roundup, we review the ways RISC-V is making its mark in the computing world—from small-scale gaming projects to large-scale corporate initiatives.
Hailed for his historic microprocessor designs at AMD, Apple, and Broadcom, Jim Keller is onto his next CPU endeavor at…
Hailed for his historic microprocessor designs at AMD, Apple, and Broadcom, Jim Keller is onto his next CPU endeavor at Tenstorrent.
Renesas, Infineon, Edge Impulse, and AnalogLamb have released boards and kits—all with the goal of accelerating…
Renesas, Infineon, Edge Impulse, and AnalogLamb have released boards and kits—all with the goal of accelerating development cycles in embedded systems.
FPGA vendor Gowin Semiconductor has teamed with RISC-V IP developer Andes Technology to develop an SRAM FPGA SoC with a…
FPGA vendor Gowin Semiconductor has teamed with RISC-V IP developer Andes Technology to develop an SRAM FPGA SoC with a hard-instantiated RISC-V core.
Housed in a familiar form factor, Milk-V’s latest SBC tackles embedded compute problems with RISC-V processing.
Housed in a familiar form factor, Milk-V’s latest SBC tackles embedded compute problems with RISC-V processing.
Emerging from stealth mode, HaiLa believes they can enable a future of IoT nodes without batteries.
Emerging from stealth mode, HaiLa believes they can enable a future of IoT nodes without batteries.
The new Root of Trust IP from Rambus offers post-quantum cryptography hardware solutions.
The new Root of Trust IP from Rambus offers post-quantum cryptography hardware solutions.
Adil Kidwai, VP and Head of Product Management at EdgeQ, discusses how they are aiming to redefine software-defined…
Adil Kidwai, VP and Head of Product Management at EdgeQ, discusses how they are aiming to redefine software-defined radios as they build what they believe is the world’s first base station-on-a-chip, using RISC-V to enable AI and 5G.
New innovations from the RISC-V Summit Europe are poised to streamline the design process for open-source processors.
New innovations from the RISC-V Summit Europe are poised to streamline the design process for open-source processors.
Three of Agile Analog's IP subsystems for battery-powered IoT solutions are entering the RISC-V ecosystem.
Three of Agile Analog's IP subsystems for battery-powered IoT solutions are entering the RISC-V ecosystem.