Latest EDA Tools Articles and Videos

This article demonstrates the operation of an LTspice shift register and discusses details of its schematic and timing…

This article demonstrates the operation of an LTspice shift register and discusses details of its schematic and timing relationships.

We explore the design and functionality of a digital shift register intended for use in mixed-signal circuit simulations.

We explore the design and functionality of a digital shift register intended for use in mixed-signal circuit simulations.

At DAC 2024, leading EDA companies partnered with Samsung to help realize its AI technology roadmap led by process nodes…

At DAC 2024, leading EDA companies partnered with Samsung to help realize its AI technology roadmap led by process nodes SF2Z and SF4U.

As data center computing and HPC advances, the stakes for ensuring reliability are high. Learn how to develop a silicon…

As data center computing and HPC advances, the stakes for ensuring reliability are high. Learn how to develop a silicon lifecycle management (SLM) strategy that ensures a successful future for your designs.

It's DAC 2024 week, and Intel Foundry, the "world’s first systems foundry for the AI era," is getting a boost from top…

It's DAC 2024 week, and Intel Foundry, the "world’s first systems foundry for the AI era," is getting a boost from top EDA vendors Ansys, Siemens, Cadence, and Synopsys.

The new EDA tool supports the industry’s growing transition toward 3D integrated circuits.

The new EDA tool supports the industry’s growing transition toward 3D integrated circuits.

Customizing the device parameters of LTspice's logic gates and flip-flops can help you more accurately simulate these…

Customizing the device parameters of LTspice's logic gates and flip-flops can help you more accurately simulate these components. This article walks through the specification process and provides some helpful tips.

This article explains how to successfully integrate logic gates into an LTspice simulation.

This article explains how to successfully integrate logic gates into an LTspice simulation.

Rich resources are available today for crafting an enclosure using 3D printing. But where to begin? In this article,…

Rich resources are available today for crafting an enclosure using 3D printing. But where to begin? In this article, learn—step by step—how to design your own custom 3D printed electronics enclosure.

Armed with key functions available in separate blocks, designers can get a headstart on PCIe Gen 7 with Synopsys’s newest IP.

Armed with key functions available in separate blocks, designers can get a headstart on PCIe Gen 7 with Synopsys’s newest IP.

In this article, we use a SPICE model for 90 nm CMOS to plot key electrical relationships of an NMOS transistor.

In this article, we use a SPICE model for 90 nm CMOS to plot key electrical relationships of an NMOS transistor.

Weebit Nano and Efabless are teaming up to make it easier for chip designers to prototype intelligent devices using…

Weebit Nano and Efabless are teaming up to make it easier for chip designers to prototype intelligent devices using Weebit's advanced memory technology.

SPICE models designed for specific CMOS process nodes can enhance simulations of integrated-circuit transistors. Learn…

SPICE models designed for specific CMOS process nodes can enhance simulations of integrated-circuit transistors. Learn where to find these models and how to use them.

This project covers two fascinating and useful circuit design techniques—the Burton Transform and Dualling—that allow…

This project covers two fascinating and useful circuit design techniques—the Burton Transform and Dualling—that allow us to transform a passive network into an active network while building an audio noise filter.

Current briefly flows through both transistors during logic-level transitions. This article explores the resulting power…

Current briefly flows through both transistors during logic-level transitions. This article explores the resulting power dissipation and provides some helpful LTspice tips for measuring current and power.

When a CMOS inverter switches logic states, power is consumed due to its charging and discharging currents. Learn how to…

When a CMOS inverter switches logic states, power is consumed due to its charging and discharging currents. Learn how to simulate these currents in LTspice.

Micron, Polar Semiconductor, and digital twin proposals are slated to receive CHIPS Act funding to help secure the U.S.…

Micron, Polar Semiconductor, and digital twin proposals are slated to receive CHIPS Act funding to help secure the U.S. semiconductor supply chain.

With TSMC scaling down to 2 nm and lower, the semiconductor giant is working with Cadence, Siemens, and Synopsys to bring…

With TSMC scaling down to 2 nm and lower, the semiconductor giant is working with Cadence, Siemens, and Synopsys to bring updated EDA tools to IC designers.

Tomide Adesanmi, co-founder and CEO of Circuit Mind, aims to release engineers from the tyranny of reading datasheets,…

Tomide Adesanmi, co-founder and CEO of Circuit Mind, aims to release engineers from the tyranny of reading datasheets, building spreadsheets, and drawing circuit symbols so they can focus on design innovation and circuit optimization.