Unveiled today, the new timing chips from Mixed-Signal Devices offer 2 GHz performance and use scalable CMOS to overcome the limits of analog alternatives.
Unveiled today, the new timing chips from Mixed-Signal Devices offer 2 GHz performance and use scalable CMOS to overcome the limits of analog alternatives.
This article explores the history of the 600 nm process, the reasons behind its phase-out, and what the industry has to…
This article explores the history of the 600 nm process, the reasons behind its phase-out, and what the industry has to look forward to as smaller, more efficient chips become the new standard.
Learn how open source silicon can provide better security than traditional measures like obscurity, but only if employed…
Learn how open source silicon can provide better security than traditional measures like obscurity, but only if employed correctly, managed well, and backed with appropriate resources.
LogiCoA provides digital precision with power consumption equivalent to analog power supplies.
LogiCoA provides digital precision with power consumption equivalent to analog power supplies.
This article demonstrates the operation of an LTspice shift register and discusses details of its schematic and timing…
This article demonstrates the operation of an LTspice shift register and discusses details of its schematic and timing relationships.
We explore the design and functionality of a digital shift register intended for use in mixed-signal circuit simulations.
We explore the design and functionality of a digital shift register intended for use in mixed-signal circuit simulations.
Customizing the device parameters of LTspice's logic gates and flip-flops can help you more accurately simulate these…
Customizing the device parameters of LTspice's logic gates and flip-flops can help you more accurately simulate these components. This article walks through the specification process and provides some helpful tips.
A string of new announcements has catapulted Alphawave Semi into the industry’s spotlight.
A string of new announcements has catapulted Alphawave Semi into the industry’s spotlight.
This article explains how to successfully integrate logic gates into an LTspice simulation.
This article explains how to successfully integrate logic gates into an LTspice simulation.
Armed with key functions available in separate blocks, designers can get a headstart on PCIe Gen 7 with Synopsys’s newest IP.
Armed with key functions available in separate blocks, designers can get a headstart on PCIe Gen 7 with Synopsys’s newest IP.
Current briefly flows through both transistors during logic-level transitions. This article explores the resulting power…
Current briefly flows through both transistors during logic-level transitions. This article explores the resulting power dissipation and provides some helpful LTspice tips for measuring current and power.
When a CMOS inverter switches logic states, power is consumed due to its charging and discharging currents. Learn how to…
When a CMOS inverter switches logic states, power is consumed due to its charging and discharging currents. Learn how to simulate these currents in LTspice.
Learn how undervoltage lockout (UVLO) can protect semiconductor devices and electronic systems from potentially hazardous…
Learn how undervoltage lockout (UVLO) can protect semiconductor devices and electronic systems from potentially hazardous operation.
For your next chip design, should you select a design-services provider with the ability to create custom fundamental IP…
For your next chip design, should you select a design-services provider with the ability to create custom fundamental IP blocks, including standard cells and libraries? This article will help you answer this question.
Daniel Cooley, CTO and SVP of Technology and Product Development, has spent nearly 20 years at Silicon Labs. He discusses…
Daniel Cooley, CTO and SVP of Technology and Product Development, has spent nearly 20 years at Silicon Labs. He discusses today’s cutting-edge wireless and IoT technologies and where he thinks they are heading over the next 50 years.
Pragmatic Semiconductor’s Founder and Executive Director joins us to discuss their thin-film, low-cost alternative to…
Pragmatic Semiconductor’s Founder and Executive Director joins us to discuss their thin-film, low-cost alternative to traditional silicon manufacturing and their aim to disrupt applications from smart labeling to IoT sensors and fingerprint sensors.
SiFive is helping lead the RISC-V revolution in automotive, Android, and AI. Senior VP Jack Kang joins the Moore’s…
SiFive is helping lead the RISC-V revolution in automotive, Android, and AI. Senior VP Jack Kang joins the Moore’s Lobby podcast to provide his insights on the success of SiFive and the open-standard RISC-V instruction set architecture (ISA).
AMD engineers presented their latest innovation this week at ISSCC, showing the world how they realized the Zen 4c CPU core.
AMD engineers presented their latest innovation this week at ISSCC, showing the world how they realized the Zen 4c CPU core.
The new hardware-assisted verification and validation system marks a first for the EDA industry.
The new hardware-assisted verification and validation system marks a first for the EDA industry.
Launched today, this new alliance promises to make high quality thin-film piezoelectric (PZT) technology more accessible…
Launched today, this new alliance promises to make high quality thin-film piezoelectric (PZT) technology more accessible to piezoelectric MEMS developers.
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