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The Core-V Chassis evaluation SoC will feature a CV64A 64-bit core and a CV32E 32-bit coprocessor core as well as 3D and 2D GPUs.

The Core-V Chassis evaluation SoC will feature a CV64A 64-bit core and a CV32E 32-bit coprocessor core as well as 3D and 2D GPUs.

This article presents an algorithm intended for humans to calibrate the internal oscillator of an MCU, with the help of…

This article presents an algorithm intended for humans to calibrate the internal oscillator of an MCU, with the help of an oscilloscope and a spreadsheet. An example experiment with numbers is also shown.

The new high-torque resolver stepping motor and control circuity is aimed at robotic, automation, and medical applications.

The new high-torque resolver stepping motor and control circuity is aimed at robotic, automation, and medical applications.

Intel’s Horse Ridge chip is expected to speed up the development of commercially viable quantum computers and burn a…

Intel’s Horse Ridge chip is expected to speed up the development of commercially viable quantum computers and burn a path to scaling larger systems.

This episode of Tech Specs is part of a video series highlighting the features, applications, and technical specs of…

This episode of Tech Specs is part of a video series highlighting the features, applications, and technical specs of newly-released products.

This article describes the internal RC oscillator calibration mechanism available in low-end microcontroller units. A…

This article describes the internal RC oscillator calibration mechanism available in low-end microcontroller units. A basic calibration procedure and considerations on automated calibration are presented.

This article will discuss the basic idea behind the synchronous demodulation technique.

This article will discuss the basic idea behind the synchronous demodulation technique.

With the Micro Core and Mosaic Core, OEMs can easily integrate thermal imaging capabilities into their products.

With the Micro Core and Mosaic Core, OEMs can easily integrate thermal imaging capabilities into their products.

This episode of Tech Specs is part of a video series highlighting the features, applications, and technical specs of…

This episode of Tech Specs is part of a video series highlighting the features, applications, and technical specs of newly-released products.

This article describes the benefits and requirements of the internal RC oscillator often available inside many low-cost…

This article describes the benefits and requirements of the internal RC oscillator often available inside many low-cost Microcontroller units, including the calibration procedure to obtain the best possible accuracy.

The four additions to the LHA series are said to be low-profile and compact, offering a range of 30-watts to 100-watts.

The four additions to the LHA series are said to be low-profile and compact, offering a range of 30-watts to 100-watts.

ST’s STPMIC1 is both a general-purpose system power management device and a companion chip for the STM32MP1 microprocessor.

ST’s STPMIC1 is both a general-purpose system power management device and a companion chip for the STM32MP1 microprocessor.

This episode of Tech Specs is part of a video series highlighting the features, applications, and technical specs of…

This episode of Tech Specs is part of a video series highlighting the features, applications, and technical specs of newly-released products.

Microchip's new RISC-V-based PolarFire SoC family is said to provide 50% lower power than competing mid-range FPGAs.

Microchip's new RISC-V-based PolarFire SoC family is said to provide 50% lower power than competing mid-range FPGAs.

Learn how to build a setup that will help you predict a battery's performance as it ages using a Trinket M0 and software…

Learn how to build a setup that will help you predict a battery's performance as it ages using a Trinket M0 and software algorithms.

Cadence and National Instruments are ramping up their collaborations to a strategic alliance to facilitate the design…

Cadence and National Instruments are ramping up their collaborations to a strategic alliance to facilitate the design process of RF integrated circuits.

The new SiC FETs combines a SiC JFET and a cascade-optimized Si MOSFET, offering an RDS(on)​​​​​​​ as low as 7mΩ.

The new SiC FETs combines a SiC JFET and a cascade-optimized Si MOSFET, offering an RDS(on)​​​​​​​ as low as 7mΩ.

On November 22, Harvey C. Nathanson passed away, leaving a legacy as the father of the first MEMS device.

On November 22, Harvey C. Nathanson passed away, leaving a legacy as the father of the first MEMS device.

The PAM8940E can generate its own drive voltage while still driving large external loads up to 47nF.

The PAM8940E can generate its own drive voltage while still driving large external loads up to 47nF.