Latest Digital ICs Articles and Videos

Learn how to implement finite-state machines in VHDL by creating a 4-bit binary counter. After compiling, it will run on…

Learn how to implement finite-state machines in VHDL by creating a 4-bit binary counter. After compiling, it will run on an Altera CPLD development board connected to a custom PCB with input switches and an LED display.

Announced this week at Hot Chips 2024, the new processors use a scalable I/O sub-system to slash energy consumption and…

Announced this week at Hot Chips 2024, the new processors use a scalable I/O sub-system to slash energy consumption and data center footprint.

Whether it’s on-phone generative AI or AI-enabled feature enhancements, Qualcomm’s new Snapdragon chip brings smart…

Whether it’s on-phone generative AI or AI-enabled feature enhancements, Qualcomm’s new Snapdragon chip brings smart performance to mobile devices.

Japan’s leading telecommunications company has partnered with quantum computing company D-Wave to use D-Wave’s…

Japan’s leading telecommunications company has partnered with quantum computing company D-Wave to use D-Wave’s equipment for network operational improvement.

Announced today, the new RISC-V processor is SiFive's first foray into mainstream data center and infrastructure use cases.

Announced today, the new RISC-V processor is SiFive's first foray into mainstream data center and infrastructure use cases.

Today, the startup announced a breadth of customizable RISC-V-based processor IP solutions backed by $100 million in funding.

Today, the startup announced a breadth of customizable RISC-V-based processor IP solutions backed by $100 million in funding.

Automakers can now choose an Intel SDV SoC and later add a discrete GPU to handle larger compute workloads.

Automakers can now choose an Intel SDV SoC and later add a discrete GPU to handle larger compute workloads.

At the width of a pencil eraser, the new digital light processing chipset may enable the "smallest, fastest, and…

At the width of a pencil eraser, the new digital light processing chipset may enable the "smallest, fastest, and lowest-power 4K ultra-high-definition (UHD) projectors ever".

Qualcomm’s new Snapdragon 4s Gen 2 platform brings 5G data, fast charging, and improved memory performance to low-cost…

Qualcomm’s new Snapdragon 4s Gen 2 platform brings 5G data, fast charging, and improved memory performance to low-cost phones worldwide.

The new line operates at 200 MHz—the highest dsPIC clock speed to date—and adds a double-precision floating point…

The new line operates at 200 MHz—the highest dsPIC clock speed to date—and adds a double-precision floating point unit and enhanced DSP engine.

Teledyne e2v’s chips target space-based applications with significantly improved performance, protection against…

Teledyne e2v’s chips target space-based applications with significantly improved performance, protection against radiation, and spatial efficiency.

Using multiple layers of diffracting materials, the researchers can physically maneuver light to perform permutations and…

Using multiple layers of diffracting materials, the researchers can physically maneuver light to perform permutations and enhance security.

This article demonstrates the operation of an LTspice shift register and discusses details of its schematic and timing…

This article demonstrates the operation of an LTspice shift register and discusses details of its schematic and timing relationships.

InspireSemi’s new compute chip couples the parallel processing of GPUs with the versatility of CPUs.

InspireSemi’s new compute chip couples the parallel processing of GPUs with the versatility of CPUs.

With the ability to shift computing resources as needed, Microchip’s new 64-bit, RISC-V processors bring needed…

With the ability to shift computing resources as needed, Microchip’s new 64-bit, RISC-V processors bring needed flexibility to embedded edge devices.

We explore the design and functionality of a digital shift register intended for use in mixed-signal circuit simulations.

We explore the design and functionality of a digital shift register intended for use in mixed-signal circuit simulations.

The new funding will expand the company’s product offerings and align it with the generative AI movement.

The new funding will expand the company’s product offerings and align it with the generative AI movement.

At every point in the design process, RISC-V developers can make use of the advancements presented at RISC-V Summit Europe.

At every point in the design process, RISC-V developers can make use of the advancements presented at RISC-V Summit Europe.

The new neural processing unit is designed for edge AI applications that require targeted machine learning in…

The new neural processing unit is designed for edge AI applications that require targeted machine learning in resource-constrained settings.