Intel has revealed the details of the long-awaited Lunar Lake architecture, bringing advanced AI compute to personal computing.
Intel has revealed the details of the long-awaited Lunar Lake architecture, bringing advanced AI compute to personal computing.
Announced this week at Hot Chips 2024, the new processors use a scalable I/O sub-system to slash energy consumption and…
Announced this week at Hot Chips 2024, the new processors use a scalable I/O sub-system to slash energy consumption and data center footprint.
The two have joined forces to craft a fourth generation, terabit-scale Cloud/Data Center Interconnect (DCI) and metro…
The two have joined forces to craft a fourth generation, terabit-scale Cloud/Data Center Interconnect (DCI) and metro transport network solution based on Microchip’s PHY and Acacia’s module.
Startups are using and supporting AI in a myriad of ways.
Startups are using and supporting AI in a myriad of ways.
Announced today, the new RISC-V processor is SiFive's first foray into mainstream data center and infrastructure use cases.
Announced today, the new RISC-V processor is SiFive's first foray into mainstream data center and infrastructure use cases.
Today, the startup announced a breadth of customizable RISC-V-based processor IP solutions backed by $100 million in funding.
Today, the startup announced a breadth of customizable RISC-V-based processor IP solutions backed by $100 million in funding.
At this year's Future of Memory and Storage show, Microchip, Micron, and Samsung presented new memory solutions in the…
At this year's Future of Memory and Storage show, Microchip, Micron, and Samsung presented new memory solutions in the age of AI—from SSD controllers to LPDDR5X DRAM.
The new mixed-signal oscilloscopes also integrate a CAT II digital multimeter, three programmable power supplies, a…
The new mixed-signal oscilloscopes also integrate a CAT II digital multimeter, three programmable power supplies, a dedicated trigger line, and an arbitrary waveform generator.
Using multiple layers of diffracting materials, the researchers can physically maneuver light to perform permutations and…
Using multiple layers of diffracting materials, the researchers can physically maneuver light to perform permutations and enhance security.
Listen in as Ananth Avva, SVP and GM at Altium, explains how new tools and a change in corporate culture allow…
Listen in as Ananth Avva, SVP and GM at Altium, explains how new tools and a change in corporate culture allow non-electronics participants to participate and positively influence circuit and PCB design.
The new current sensors integrate more features, reducing the need for external components.
The new current sensors integrate more features, reducing the need for external components.
InspireSemi’s new compute chip couples the parallel processing of GPUs with the versatility of CPUs.
InspireSemi’s new compute chip couples the parallel processing of GPUs with the versatility of CPUs.
As data center computing and HPC advances, the stakes for ensuring reliability are high. Learn how to develop a silicon…
As data center computing and HPC advances, the stakes for ensuring reliability are high. Learn how to develop a silicon lifecycle management (SLM) strategy that ensures a successful future for your designs.
The new EDA tool supports the industry’s growing transition toward 3D integrated circuits.
The new EDA tool supports the industry’s growing transition toward 3D integrated circuits.
As RISC-V gains traction as an open-source alternative to Arm, several companies have announced partnerships and research…
As RISC-V gains traction as an open-source alternative to Arm, several companies have announced partnerships and research to bolster the ISA.
SureCore has announced a low-power, cryogenic SRAM to reduce the energy demands of AI workloads on data centers.
SureCore has announced a low-power, cryogenic SRAM to reduce the energy demands of AI workloads on data centers.
Armed with key functions available in separate blocks, designers can get a headstart on PCIe Gen 7 with Synopsys’s newest IP.
Armed with key functions available in separate blocks, designers can get a headstart on PCIe Gen 7 with Synopsys’s newest IP.
Using a modular fabrication process, the team created a quantum-system-on-chip that integrates artificial atom qubits…
Using a modular fabrication process, the team created a quantum-system-on-chip that integrates artificial atom qubits onto a semiconductor chip.
Weebit Nano and Efabless are teaming up to make it easier for chip designers to prototype intelligent devices using…
Weebit Nano and Efabless are teaming up to make it easier for chip designers to prototype intelligent devices using Weebit's advanced memory technology.
The new processors promise 3:1 rack consolidation, 4.2x rack-level performance gains, and 2.6x performance per watt gains.
The new processors promise 3:1 rack consolidation, 4.2x rack-level performance gains, and 2.6x performance per watt gains.