SenslinQ combines integrated software with sensors, Arm- or RISC-V-based MCUs, Ceva's DSP units, and other connected technologies for contextually-aware IoT devices.
SenslinQ combines integrated software with sensors, Arm- or RISC-V-based MCUs, Ceva's DSP units, and other connected technologies for contextually-aware IoT devices.
Omnivision aims to make the High-Efficiency Video Coding (HEVC) standard a practical choice for battery-powered home…
Omnivision aims to make the High-Efficiency Video Coding (HEVC) standard a practical choice for battery-powered home security devices.
Loongson’s 3A4000 and 3B000 processors were manufactured using ST’s 28nm FD-SOI process.
Loongson’s 3A4000 and 3B000 processors were manufactured using ST’s 28nm FD-SOI process.
The COM-WHUC6 module, measuring at 95mm x 95mm, can support up to 64GB of eMMC memory with two available DDR4 slots.
The COM-WHUC6 module, measuring at 95mm x 95mm, can support up to 64GB of eMMC memory with two available DDR4 slots.
Flex Logix’s eFPGA is a low-power FPGA that can be integrated into SoCs, microcontrollers, and ICs.
Flex Logix’s eFPGA is a low-power FPGA that can be integrated into SoCs, microcontrollers, and ICs.
This article describes the internal RC oscillator calibration mechanism available in low-end microcontroller units. A…
This article describes the internal RC oscillator calibration mechanism available in low-end microcontroller units. A basic calibration procedure and considerations on automated calibration are presented.
The Digi ConnectCore 8M Nano SOM platform is designed to reduce time to market for sophisticated IoT designs.
The Digi ConnectCore 8M Nano SOM platform is designed to reduce time to market for sophisticated IoT designs.
Groq, a semiconductor startup with software roots, has developed a new processing unit with a unique architecture that…
Groq, a semiconductor startup with software roots, has developed a new processing unit with a unique architecture that offers inference solutions for AI acceleration.
This article will explore AXI interconnects, the digital logic that allows multiple AXI masters and AXI slaves to communicate.
This article will explore AXI interconnects, the digital logic that allows multiple AXI masters and AXI slaves to communicate.
In this article, Ted Speers of Microchip reflects on how RISC-V and its security stack offer a solution for the…
In this article, Ted Speers of Microchip reflects on how RISC-V and its security stack offer a solution for the development of computer architecture and processor security.
This article describes a methodology that automates set up, constraints, and results analysis as designs move from static…
This article describes a methodology that automates set up, constraints, and results analysis as designs move from static CDC analysis to formal verification to simulation and avoid manual scripting efforts, thus reducing setup effort and errors.
TI designed the new ADC to capture low-distortion audio recordings from far distances or in noisy environments.
TI designed the new ADC to capture low-distortion audio recordings from far distances or in noisy environments.
Two new NPUs, along with a GPU and DPU, expand the scope of the doable for low-cost devices.
Two new NPUs, along with a GPU and DPU, expand the scope of the doable for low-cost devices.
In this article, we’ll first review the basic architecture of a SAR ADC and then take a look at one of its common applications.
In this article, we’ll first review the basic architecture of a SAR ADC and then take a look at one of its common applications.
Dialog Semi's four new high-frequency, I2C-controlled buck converters aim to save onboard space and external component count.
Dialog Semi's four new high-frequency, I2C-controlled buck converters aim to save onboard space and external component count.
NSITEXE utilizes Synopsys’ development tools and IP to build a SoC (system-on-a-chip) for autonomous driving.
NSITEXE utilizes Synopsys’ development tools and IP to build a SoC (system-on-a-chip) for autonomous driving.
This article will discuss how to implement a shift register in Verilog. The register described can be synthesized and…
This article will discuss how to implement a shift register in Verilog. The register described can be synthesized and downloaded to an FPGA for test in actual hardware.
This article looks at gallium arsenide, comparing it to other semiconductor materials, and explores how different…
This article looks at gallium arsenide, comparing it to other semiconductor materials, and explores how different compounds are used in components.
The Alveo U50 adaptable accelerator fits into a PCIe slot, saves power, and improves throughput and latency.
The Alveo U50 adaptable accelerator fits into a PCIe slot, saves power, and improves throughput and latency.
This article will take a closer look at the commands used to control and interact with DRAM.
This article will take a closer look at the commands used to control and interact with DRAM.