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u-blox Tackles Ails of Communication in Harsh Environments with Bluetooth 5 Module

u-blox Tackles Ails of Communication in Harsh Environments with Bluetooth 5 Module

The module is housed in a 7.5mm × 9.5mm × 1.5mm package and supports Thread and Zigbee.


News Dec 19, 2019 by Gary Elinoff
OpenHW Group Announces Multi-core Evaluation SoC Based on the NXP iMX Platform

OpenHW Group Announces Multi-core Evaluation SoC Based on the NXP iMX Platform

The Core-V Chassis evaluation SoC will feature a CV64A 64-bit core and a CV32E 32-bit coprocessor core as well as 3D and 2D GPUs.


News Dec 13, 2019 by Cabe Atwell
Microchip Announces First RISC-V-based SoC FPGA to Use Half the Power of Other FPGAs

Microchip Announces First RISC-V-based SoC FPGA to Use Half the Power of Other FPGAs

Microchip's new RISC-V-based PolarFire SoC family is said to provide 50% lower power than competing mid-range FPGAs.


News Dec 10, 2019 by Lisa Boneta.
Recent FPGAs Designed for C++ and Python, Harsh Environments, and ASIC Prototyping

Recent FPGAs Designed for C++ and Python, Harsh Environments, and ASIC Prototyping

These recently-released FPGAs aim to use accessible programming languages, withstand harsh environments, and support ASIC prototyping.


News Nov 23, 2019 by Robin Mitchell
Xilinx Hails New Single-chip Microprocessors as the “World’s Highest Performing” for ADAS

Xilinx Hails New Single-chip Microprocessors as the “World’s Highest Performing” for ADAS

The single chip integrates 64-bit quad-core Arm Cortex-A53 and the dual-core Arm Cortex-R5 based processing system.


News Nov 15, 2019 by Lisa Boneta.
STMicroelectronics Designs Wireless Support for ST8500 Chipset in Smart Meters

STMicroelectronics Designs Wireless Support for ST8500 Chipset in Smart Meters

The ST8500 PLC chipset allows smart meters to communicate wirelessly through existing power cables or RF waves.


News Nov 14, 2019 by Cabe Atwell
Dialog Semi Releases “World’s Smallest and Most Power Efficient” Bluetooth 5.1 SoC Module for IoT Applications

Dialog Semi Releases “World’s Smallest and Most Power Efficient” Bluetooth 5.1 SoC Module for IoT Applications

Dialog Semiconductor today announced a new BLE SoC—one it claims is the smallest and least power-hungry on the market.


News Nov 04, 2019 by Robin Mitchell
Synopsys and NSITEXE Partnership Finds Success with Accelerated Processor SoC Development

Synopsys and NSITEXE Partnership Finds Success with Accelerated Processor SoC Development

NSITEXE utilizes Synopsys’ development tools and IP to build a SoC (system-on-a-chip) for autonomous driving.


News Sep 09, 2019 by Gary Elinoff
Xilinx Claims Title of “World’s Largest FPGA” with New VU19P

Xilinx Claims Title of “World’s Largest FPGA” with New VU19P

Composed of 35 billion transistors, the VU19P is the newest member of the 16 nm Virtex UltraScale+ family.


News Aug 28, 2019 by Gary Elinoff
Security Flaw Found in Xilinx Zinc UltraScale+ Encrypt Only Secure Boot

Security Flaw Found in Xilinx Zinc UltraScale+ Encrypt Only Secure Boot

Security flaws can leave products vulnerable and give engineers sleepless nights. Recently, a new security flaw was found in Xilinx's Zynq UltraScale+ SoC devices' encrypt only secure boot.


News Aug 23, 2019 by Robin Mitchell
The New Xilinx FPGA Accelerator Card Is Trying to Give Traditional Processors a Run for Their Money

The New Xilinx FPGA Accelerator Card Is Trying to Give Traditional Processors a Run for Their Money

The Alveo U50 adaptable accelerator fits into a PCIe slot, saves power, and improves throughput and latency.


News Aug 14, 2019 by Gary Elinoff
Nissan Adopts Renesas SoC and MCU for Assisted Driving Platform

Nissan Adopts Renesas SoC and MCU for Assisted Driving Platform

Nissan has adopted Renesas's R-Car SOC and RH850 MCU for its ProPilot2 driver assistance system.


News Aug 08, 2019 by Gary Elinoff
What Does It Mean for an SoC to Be Secure? A Closer Look at the Wireless Gecko Series 2

What Does It Mean for an SoC to Be Secure? A Closer Look at the Wireless Gecko Series 2

What makes a secure SoC actually... secure? Check out this overview of hardware-based security features in a real-world example IC.


News Jul 24, 2019 by Mark Hughes
AI Hardware Roundup: Neuromorphic Chips and Neural Network SoCs

AI Hardware Roundup: Neuromorphic Chips and Neural Network SoCs

AI algorithms take a lot of resources to function. What hardware can handle running them on the edge?


News Jul 18, 2019 by Robin Mitchell
Microchip Announces Smart Embedded Vision Initiative for Machine Vision System Design

Microchip Announces Smart Embedded Vision Initiative for Machine Vision System Design

Using Microsemi PolarFire FPGAs, the new program aims to enable compact, high-bandwidth, low-power system design.


News Jul 16, 2019 by Gary Elinoff
Audio SoCs Prove Vital for Always-on Voice Activation Platforms and Edge Device AI

Audio SoCs Prove Vital for Always-on Voice Activation Platforms and Edge Device AI

As voice-activated digital assistant devices continue to gain popularity, AI- and audio-focused SoCs evolve.


News Apr 29, 2019 by Majeed Ahmad
Is It Possible to Be Truly Wireless? Huawei Implements Dialog Semi SoC in Wireless Headphones

Is It Possible to Be Truly Wireless? Huawei Implements Dialog Semi SoC in Wireless Headphones

Huawei has chosen Dialog Semiconductor's DA14195 SoC for new wireless headphone devices.


News Mar 07, 2019 by Robin Mitchell
Microsemi Releases Libero SoC 12.0, a New Unified Design Suite for SoC FPGA Development

Microsemi Releases Libero SoC 12.0, a New Unified Design Suite for SoC FPGA Development

This week, Microsemi announced their latest unified design suite to help streamline the process of developing on FPGAs.


News Jan 31, 2019 by Robin Mitchell
Design Implementation in the Xilinx Vivado Design Suite

Design Implementation in the Xilinx Vivado Design Suite

This article will look at the techniques that Vivado employs to accelerate design implementation.


News Sep 07, 2018 by Dr. Steve Arar
FPGA Design Software: An Overview of Time-to-Integration Features in Xilinx’s Vivado Design Suite

FPGA Design Software: An Overview of Time-to-Integration Features in Xilinx’s Vivado Design Suite

This article will look at some of the most important features of the Xilinx Vivado Design Suite which accelerates the "time to integration" of the design procedure.


News Aug 24, 2018 by Dr. Steve Arar