In this edition of Business Shorts, SK Group and Nvidia plan $500 billion in AI infrastructure, TDK and LG Innotek team up on robotic sensing, and Micron locks…
In this edition of Business Shorts, SK Group and Nvidia plan $500 billion in AI infrastructure, TDK and LG Innotek team up on robotic sensing, and Micron locks in automotive memory supply.
A new three-phase motor gate driver integrates a bootstrap diode and robust protective mechanisms to streamline designs…
A new three-phase motor gate driver integrates a bootstrap diode and robust protective mechanisms to streamline designs and reduce switching losses in compact motor applications.
Sparsity-based model compression from the Neuronix AI Labs acquisition promises up to 2x faster CNN inference on…
Sparsity-based model compression from the Neuronix AI Labs acquisition promises up to 2x faster CNN inference on low-power, SEU-immune hardware.
Announced today, the new Ryzen AI Embedded X100 Series and Kria AI platform unify CPU, GPU, and NPU compute to provide…
Announced today, the new Ryzen AI Embedded X100 Series and Kria AI platform unify CPU, GPU, and NPU compute to provide the low-latency performance and deterministic control required for advanced physical AI robotics.
The new SECORA ID Key S USB security solution supports FIDO2 and PKI through hardware and near field interfaces.
The new SECORA ID Key S USB security solution supports FIDO2 and PKI through hardware and near field interfaces.
With the three new boards, developers can seamlessly integrate complex I2C sensor networks with motor drive systems…
With the three new boards, developers can seamlessly integrate complex I2C sensor networks with motor drive systems without the headaches of chaotic wiring.
The Cortex-M23 microcontroller pairs metrology-grade signal acquisition with an LCD driver and Class-D voice output in a…
The Cortex-M23 microcontroller pairs metrology-grade signal acquisition with an LCD driver and Class-D voice output in a single LQFP128 package.
The Titanium Edge FPGA family targets constrained edge AI with 50% lower power, compact SiP packages, high-speed MIPI…
The Titanium Edge FPGA family targets constrained edge AI with 50% lower power, compact SiP packages, high-speed MIPI I/O, and robust security/reliability features for intelligent systems.
The ST54M places an NFC controller, secure element, and eSIM on one die and adds a hardware accelerator for NIST's…
The ST54M places an NFC controller, secure element, and eSIM on one die and adds a hardware accelerator for NIST's post-quantum algorithms.
The OECD is analyzing the semiconductor industry, focusing on supply chain resilience, global value chain mapping, and…
The OECD is analyzing the semiconductor industry, focusing on supply chain resilience, global value chain mapping, and the impact of rising industrial subsidies on global market competition.
Called Gleanmer, the 16-nm system-on-chip swaps memory-hungry voxels for compact Gaussian “blobs” to map and navigate…
Called Gleanmer, the 16-nm system-on-chip swaps memory-hungry voxels for compact Gaussian “blobs” to map and navigate at roughly 6 mW.
The full-stack platform pairs the IGX Thor compute module with a safety-certified software stack and an accredited…
The full-stack platform pairs the IGX Thor compute module with a safety-certified software stack and an accredited inspection lab, with humanoid maker Agility as the first adopter.
Intel's 1980 microcontroller put a CPU, memory, timers, and serial I/O on a single chip. It’s an architecture that…
Intel's 1980 microcontroller put a CPU, memory, timers, and serial I/O on a single chip. It’s an architecture that still ships inside billions of devices.
Announced today, the new AMD Versal Premium Gen 2 MoP SoCs boost performance by integrating memory on-package. It cuts…
Announced today, the new AMD Versal Premium Gen 2 MoP SoCs boost performance by integrating memory on-package. It cuts board space by 60% while gaining 288 GB/s bandwidth and 15-year lifecycle.
Launched today, Synopsys’ ESUN IP solution slashes AI tail latency and eliminates networking bottlenecks to enable…
Launched today, Synopsys’ ESUN IP solution slashes AI tail latency and eliminates networking bottlenecks to enable seamless, scalable performance for modern AI infrastructure.
The new system-on-chip pairs a heterogeneous AI compute engine with a low-latency multi-camera image signal processor,…
The new system-on-chip pairs a heterogeneous AI compute engine with a low-latency multi-camera image signal processor, and can ship pre-integrated with emotion3D perception software.
The new reference design leverages EPC’s monolithic GaN module to deliver an ultra-compact, high-efficiency motor drive…
The new reference design leverages EPC’s monolithic GaN module to deliver an ultra-compact, high-efficiency motor drive solution specifically optimized for humanoid robotics and drones.
The 120 MHz GD32E512 is optimized for high-speed optical modules and the 72 MHz GD32E252 takes on low-speed optical modules.
The 120 MHz GD32E512 is optimized for high-speed optical modules and the 72 MHz GD32E252 takes on low-speed optical modules.
Announced today, the all-in-one VL53L9CX combines stacked BSI SPAD technology, metasurface optics, and on-chip processing…
Announced today, the all-in-one VL53L9CX combines stacked BSI SPAD technology, metasurface optics, and on-chip processing to deliver dense spatial awareness directly to small microcontrollers.
By treating spinal cord injuries as a signal-integrity challenge, engineers are using deep learning and wireless…
By treating spinal cord injuries as a signal-integrity challenge, engineers are using deep learning and wireless technology to successfully reconnect the brain to paralyzed limbs.
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