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Siemens Rolls Out IC Design Tool for Data-driven Verification

Seeking to leverage today’s data-rich engineering world, Siemens has released Questa Verification IQ, a software platform enabling data-driven IC verification.

2 days ago by Jeff Child

Bluespec Teams Up with Synopsys for RISC-V Core Verification Effort

With their collaboration, the firms hope to enable faster and improved functional verification testing for Bluespec’s RISC-V cores.

January 24, 2023 by Jake Hertz

Exclusive—IBM Shares Details of Its 400+ Qubit Quantum Processor

All About Circuits spoke with IBM physicist and chief quantum hardware architect Oliver Dial to get exclusive details on IBM's 400+ qubit quantum processor: Osprey.

January 23, 2023 by Ingrid Fadelli

Editor’s Choice: Round Out 2022 With Our Top 10 News Articles

Take a journey back in time to remember some of the tech and events from the world of electronics in 2022.

December 27, 2022 by Kimber Wymore

Lattice Debuts Low-power FPGA Family in Tiny Form Factor

In an effort to marry power efficiency with mid-range FPGA performance, the company has unveiled a new family of tiny form factor, low-power devices.

December 13, 2022 by Jeff Child

5 Online EE Resources I WOULD Have Been Thankful For

On this Thanksgiving Day, Jeff wonders what his EE college days would have been like if he’d had access to All About Circuits’ rich online resources.

November 24, 2022 by Jeff Child

NASA’s EMIT Mission Taps FPGA Processing to Measure Surface Minerals

Representing a joint effort to accurately characterize the minerals present on the Earth’s surface, NASA’s JPL leverages optical and FPGA-based advances to help in modeling the Earth’s climate.

November 08, 2022 by Aaron Carman

Computers on Wheels: A Spotlight on Three Automotive IC Innovations

Vehicles today operate on thousands of ICs. Here are three interesting chips that exemplify the diversity of automotive technology.

October 15, 2022 by Antonio Anzaldua Jr.

Your Back-to-School Guide to All About Circuits’ Educational Resources

For students back in college for their Fall semester—and anyone who needs a refresher—here’s the lowdown on our top-notch textbooks, technical articles, and calculators for EE studies.

October 12, 2022 by Jeff Child

CEVA Serves Up ASIC IP Platform for 5G O-RAN Designs

Aiming to ease the challenges of 5G Open RAN (O-RAN) system designs, CEVA has unveiled a baseband IP platform for 5G RAN ASICs.

September 26, 2022 by Jake Hertz

Microchip Pushes First RISC-V-based SoC FPGA to Mass Production

Microchip continues the push for RISC-V hardware by reaching milestones with its PolarFire system-on-a-chip (SoC) field-programmable gate array (FPGA) and Mi-V ecosystem.

June 10, 2022 by Jake Hertz

AMD SOM Kit Propels Robotics Beyond Custom Designs

Keen to free industrial robotics from the burdens of custom design, AMD has launched a SOM-based starter kit that puts ROS 2 and predefined interface apps into play.

May 17, 2022 by Jeff Child

SpaceX Loses 40 Satellites to Radiation: Spotlight on Rad-hard IC Design

Space, the "final frontier," has been a growing area of interest, especially for electronic devices. Companies like Microchip, BAE Systems, Intel, CAES, and Lattice Semiconductor take aim for better space-rated IC design.

February 14, 2022 by Darshil Patel

Around the Industry: Examples of How Complex ICs Require Complex Design Tools

Industries like aerospace and defense are only raising the bar on IC requirements. Here are a few recently announced tools helping IC designers meet the task.

December 21, 2021 by Ikimi .O

Intel’s FPGA Day Unveils 3 Collabs to Create More FPGA-based IPU Designs

Seeing these advantages of using field programmable gate array (FPGA) technology, this week is Intel's FPGA Day, which just announced a collab to further FPGA-based infrastructure processing units (IPUs).

December 09, 2021 by Jake Hertz

Cadence Releases First ECAD Platform Dedicated to 3D System Design

The Cadence Integrity 3D-IC platform brings together a suite of advanced floor planning and validation software to develop 3D-stacked SoC designs.

October 12, 2021 by Adrian Gibbons

Why Physical Verification Is Only Getting Tougher With Advanced Nodes

In the nanometer era, IC complexity grows faster than die areas. EDA companies are stepping up with tools to streamline physical verification.

April 14, 2021 by Antonio Anzaldua Jr.

Boosting Memory Performance in the Age of DDR5: An Intro to DDR Training Modes

Analysts predict that DDR5 will dominate the DRAM market in coming years. How do you calibrate DDR for peak memory performance?

November 06, 2020 by Dr. Steve Arar

Intel and Analog Devices Link Up to Streamline 5G Network Design

The two RF powerhouses have teamed up to create a flexible radio platform that addresses 5G network design challenges.

August 05, 2020 by Jake Hertz

Google Proposes AI as Solution for Speedier AI Chip Design

One of the trickiest aspects of chip design is figuring out how to pack more circuitry into a smaller footprint while maintaining power, speed, and energy efficiency.

April 06, 2020 by Luke James