Latest AI/Neural Networks News

Announced today, the entry-level oscilloscope family targets the expanding overlap of IoT sensing, modern power…

Announced today, the entry-level oscilloscope family targets the expanding overlap of IoT sensing, modern power topologies, and university engineering labs. It’s armed with a new FPGA architecture and a touch interface.

Announced today, NXP’s new unified robotics platform provides a "neural axis" architecture and pre-validated drone…

Announced today, NXP’s new unified robotics platform provides a "neural axis" architecture and pre-validated drone reference designs to accelerate trusted physical AI system deployment.

The new CR-8000 2026 platform brings AI enhancements for schematic automation, real-time validation, and layout acceleration.

The new CR-8000 2026 platform brings AI enhancements for schematic automation, real-time validation, and layout acceleration.

At a NYC press and analyst dinner, MediaTek executives described how the company's custom XPU works with NVIDIA and plans…

At a NYC press and analyst dinner, MediaTek executives described how the company's custom XPU works with NVIDIA and plans to move beyond the smartphone market.

The new sensing and power portfolio addresses critical size, weight, and safety challenges in physical AI, enabling…

The new sensing and power portfolio addresses critical size, weight, and safety challenges in physical AI, enabling near-human dexterity and high torque density in modern robotics.

Announced today, Altera has a new FPGA portfolio along with an AI expert companion designed to accelerate development for…

Announced today, Altera has a new FPGA portfolio along with an AI expert companion designed to accelerate development for next-generation digital and physical AI fabrics.

Discover how enhanced neural processing and memory simplify system development to deliver low-latency, power-efficient…

Discover how enhanced neural processing and memory simplify system development to deliver low-latency, power-efficient intelligence at the edge without cloud reliance.

Demystify collecting high-quality data from sensors using DEEPCRAFT™ Studio! This presentation equips you to gather…

Demystify collecting high-quality data from sensors using DEEPCRAFT™ Studio! This presentation equips you to gather data and get AI models running on the edge.

Lotus Microsystems co-founder Yasser Nour discusses 3D vertical power interposers, finding fab partners, and navigating…

Lotus Microsystems co-founder Yasser Nour discusses 3D vertical power interposers, finding fab partners, and navigating industry talent shortages while building a hardware startup.

The new xMCU family pairs Arm's Cortex-M85 and Cortex-M52 for the first time and packages custom DRAM scaling to hundreds…

The new xMCU family pairs Arm's Cortex-M85 and Cortex-M52 for the first time and packages custom DRAM scaling to hundreds of megabytes alongside the MCU.

Renesas UX leader Ivo Marocco explores physical AI and intelligence at the edge. He details how autonomous systems and…

Renesas UX leader Ivo Marocco explores physical AI and intelligence at the edge. He details how autonomous systems and humanoid robots must be developed responsibly, safely, and efficiently.

Announced today, the company's new PiezoMEMS air movers reach subsystems that conventional fans and cold plates can’t.

Announced today, the company's new PiezoMEMS air movers reach subsystems that conventional fans and cold plates can’t.

Efinix expands its Sapphire RISC-V SoC family with a configurable 64-bit processor offering larger memory support, Linux…

Efinix expands its Sapphire RISC-V SoC family with a configurable 64-bit processor offering larger memory support, Linux capability and FPGA acceleration for embedded and edge AI designs.

This week, at the OCP Summit, Texas Instruments unveiled three new ICs designed to prevent power glitches, streamline…

This week, at the OCP Summit, Texas Instruments unveiled three new ICs designed to prevent power glitches, streamline high-voltage distribution, and minimize signal jitter in AI data centers.

Intel, AMD, and Arm each made agentic AI announcements this week at OCP 2026, covering rack processor units, rack…

Intel, AMD, and Arm each made agentic AI announcements this week at OCP 2026, covering rack processor units, rack architecture, and benchmarking

iDEAL Semiconductor co-founder David Jauregui outlines how the silicon SuperQ architecture can challenge SiC and GaN in…

iDEAL Semiconductor co-founder David Jauregui outlines how the silicon SuperQ architecture can challenge SiC and GaN in power electronics and leverage silicon's infrastructure lead.

Ross connects developers' preferred LLMs to AMD's Vivado and Vitis HLS toolchains through open-standard MCP servers.

Ross connects developers' preferred LLMs to AMD's Vivado and Vitis HLS toolchains through open-standard MCP servers.

The Edinburgh startup's Litavis chip unifies imaging, timing, and histogramming on a single device.

The Edinburgh startup's Litavis chip unifies imaging, timing, and histogramming on a single device.

The X7 runs on 2-5 W, connects over PCIe Gen 3 or USB 3.2, and uses the same CVflow engine already in over 50 million of…

The X7 runs on 2-5 W, connects over PCIe Gen 3 or USB 3.2, and uses the same CVflow engine already in over 50 million of the company’s AI SoCs.