Thread Group and Broadband Forum are partnering to unify IoT mesh with broadband infrastructure. Also, the new Thread Tools app launches to provide real-world…
Thread Group and Broadband Forum are partnering to unify IoT mesh with broadband infrastructure. Also, the new Thread Tools app launches to provide real-world network diagnostics for engineers.
The new XpressConnect PCIe 6.0 and CXL 3.1 Retimers reign in signal integrity challenges in AI data centers and other…
The new XpressConnect PCIe 6.0 and CXL 3.1 Retimers reign in signal integrity challenges in AI data centers and other high-bandwidth installations.
France’s Électronique 2030 program commits €5B+ to revitalize its semiconductor industry. Learn the details of this…
France’s Électronique 2030 program commits €5B+ to revitalize its semiconductor industry. Learn the details of this ambitious effort, and the market challenges it’s facing.
At Computex, Intel described the CPU as the control plane for agentic workloads, pairing new processors and network…
At Computex, Intel described the CPU as the control plane for agentic workloads, pairing new processors and network controllers with fresh details on its inference GPU.
The 88-core Vera processor introduces Spatial Multithreading and a claimed 1.8x task-completion lead over x86 processors.
The 88-core Vera processor introduces Spatial Multithreading and a claimed 1.8x task-completion lead over x86 processors.
At Computex 2026, the company is expanding its Edge AI ecosystem by introducing the Snapdragon C Platform for entry-level…
At Computex 2026, the company is expanding its Edge AI ecosystem by introducing the Snapdragon C Platform for entry-level laptops, and the Dragonwing IQ10 Reference Design for robotics.
The bottleneck limiting the next generation of artificial intelligence isn't compute power—it's the wire connecting the…
The bottleneck limiting the next generation of artificial intelligence isn't compute power—it's the wire connecting the chips. French startup Scintil Photonics thinks it has the answer.
Broadcom’s high-integration Wi-Fi 8 & NPU-accelerated 50G PON gateway SoCs aim to build a cohesive, 50 Gbps broadband…
Broadcom’s high-integration Wi-Fi 8 & NPU-accelerated 50G PON gateway SoCs aim to build a cohesive, 50 Gbps broadband access ecosystem for the AI-infused home.
A South Korean startup, KoolMicro, is betting that liquid cooling built into the chip package itself is the only way to…
A South Korean startup, KoolMicro, is betting that liquid cooling built into the chip package itself is the only way to handle the next generation of GPU heat loads.
The new version of FPGA AI Suite is designed to accelerate trained AI models into FPGAs
The new version of FPGA AI Suite is designed to accelerate trained AI models into FPGAs
Three new chips pair a cost-optimized fiber gateway processor with single-die dual-band Wi-Fi 8 radios, aiming to bring…
Three new chips pair a cost-optimized fiber gateway processor with single-die dual-band Wi-Fi 8 radios, aiming to bring the latest wireless standard to price-sensitive service provider markets.
An audit finds that the European Chips Act is "very unlikely" to hit the 20% global market target by 2030, citing…
An audit finds that the European Chips Act is "very unlikely" to hit the 20% global market target by 2030, citing fragmented funding, slow progress on FOAKs, and fierce international competition.
The MEMS-based oscillator delivers less than 1 nanosecond of time synchronization accuracy for AI clusters.
The MEMS-based oscillator delivers less than 1 nanosecond of time synchronization accuracy for AI clusters.
SpaceX’s proposed Terafab and Apple's preliminary discussions indicate escalating pressure to expand domestic…
SpaceX’s proposed Terafab and Apple's preliminary discussions indicate escalating pressure to expand domestic semiconductor production.
Google Cloud split the TPU line into training and inference variants, with Arm Neoverse-based Axion CPUs as the host…
Google Cloud split the TPU line into training and inference variants, with Arm Neoverse-based Axion CPUs as the host across the stack. Arm also rolled out Performix, a free performance toolkit aimed at the silicon's growing developer base.
The module brings Intel's NPU-integrated processors to entry-level x86 systems, scaling edge AI performance and…
The module brings Intel's NPU-integrated processors to entry-level x86 systems, scaling edge AI performance and simplifying integration and long-term upgrades.
Learn how Korean AI technology company Rebellions uses proprietary dataflow NPUs, chiplets, and HBM to deliver…
Learn how Korean AI technology company Rebellions uses proprietary dataflow NPUs, chiplets, and HBM to deliver high-efficiency, scalable AI inference for modern data centers.
Released in June 1978 after a three-month architecture sprint, the 8086 was meant to buy Intel time while it finished its…
Released in June 1978 after a three-month architecture sprint, the 8086 was meant to buy Intel time while it finished its real next-gen processor. But the real one failed, and the stopgap built x86.
The MIT professor emeritus shaped time-sharing, computer architecture, and a generation of engineers during a career…
The MIT professor emeritus shaped time-sharing, computer architecture, and a generation of engineers during a career spanning four decades.
Integration and efficiency are reshaping modern system design, from rad-hard ICs in NASA’s Artemis II mission to SoCs…
Integration and efficiency are reshaping modern system design, from rad-hard ICs in NASA’s Artemis II mission to SoCs turning ID badges into wireless systems.
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