The LSM6DSK320X and ISM6HGK256X combine low-g and high-g measurement in a 2.5 mm x 3 mm package using lead-free, BPA-free materials.
The LSM6DSK320X and ISM6HGK256X combine low-g and high-g measurement in a 2.5 mm x 3 mm package using lead-free, BPA-free materials.
Rambus' CryptoManager Root of Trust solution for Caliptra-based SoCs adds hardware security, attack protection, and…
Rambus' CryptoManager Root of Trust solution for Caliptra-based SoCs adds hardware security, attack protection, and lifecycle management for data center and AI chips.
In this interview article, Renesas VP Peter Jenkins discusses how the company is leveraging its automotive sensor…
In this interview article, Renesas VP Peter Jenkins discusses how the company is leveraging its automotive sensor heritage and mixed-signal ICs to power the future of edge AI and humanoid robotics.
The SY757xx family translates clock inputs from 1.2 to 3.3 V down to 1.2 V LVCMOS outputs at frequencies up to 250 MHz,
The SY757xx family translates clock inputs from 1.2 to 3.3 V down to 1.2 V LVCMOS outputs at frequencies up to 250 MHz,
The new PSOC Control C3 product line focuses on secure, high-performance power conversion and motor control applications.
The new PSOC Control C3 product line focuses on secure, high-performance power conversion and motor control applications.
Recent semiconductor business moves from Nvidia, MediaTek, GlobalFoundries, Qualcomm, Amazon, and Analog Devices…
Recent semiconductor business moves from Nvidia, MediaTek, GlobalFoundries, Qualcomm, Amazon, and Analog Devices highlight growing investment in AI infrastructure, quantum manufacturing, optical connectivity, and edge intelligence.
Announced today by AtlasBase, Thalia is a 5.6B-well bio-silicon chip that uses synthetic DNA to break power and density…
Announced today by AtlasBase, Thalia is a 5.6B-well bio-silicon chip that uses synthetic DNA to break power and density bottlenecks in AI data center storage and molecular computing.
Announced today, MediaTek's new 3 nm Dimensity CX C10 Max SoC features an all-big-core Arm CPU and NPU 890 to bring…
Announced today, MediaTek's new 3 nm Dimensity CX C10 Max SoC features an all-big-core Arm CPU and NPU 890 to bring flagship AI performance to fanless Googlebooks.
New T&M tools from Rohde & Schwarz, Tektronix, and Teradyne target packaged-goods inspection, HDMI and automotive…
New T&M tools from Rohde & Schwarz, Tektronix, and Teradyne target packaged-goods inspection, HDMI and automotive compliance testing, and advanced AI semiconductor testing.
By embedding heterogeneous Si, SiC, and GaN die directly into 12-inch silicon wafers with precision RDLs, Onsemi's EPP…
By embedding heterogeneous Si, SiC, and GaN die directly into 12-inch silicon wafers with precision RDLs, Onsemi's EPP replaces wire bonds and mold compounds to deliver up to 5x power density.
The flagship system-on-chip pairs a 4th-generation All Big Core CPU and dual neural processing units to drive high-end…
The flagship system-on-chip pairs a 4th-generation All Big Core CPU and dual neural processing units to drive high-end compute and proactive mobile intelligence.
Launched today, Delos Data’s Nonstop AI portfolio intros Apollo Data Interface silicon, the Morpheus development…
Launched today, Delos Data’s Nonstop AI portfolio intros Apollo Data Interface silicon, the Morpheus development platform, and a system-level reference architecture to eliminate tail latency, maximize power efficiency, and scale agentic AI clusters.
M6 is Apple's first 2-nm chip and features a dual 16-core Neural Engine, while the M5 Ultra joins four dies to achieve…
M6 is Apple's first 2-nm chip and features a dual 16-core Neural Engine, while the M5 Ultra joins four dies to achieve 1.2 TB/s of unified memory bandwidth.
The new evaluation kits aim to lower the barrier for on-device AI development with Alif’s AI/ML hardware-accelerated…
The new evaluation kits aim to lower the barrier for on-device AI development with Alif’s AI/ML hardware-accelerated Ensemble and Balletto MCUs.
Announced today, the company's new CSS for Mobile 2 platform, Total Design for Physical AI program, and Neoverse CSS N4…
Announced today, the company's new CSS for Mobile 2 platform, Total Design for Physical AI program, and Neoverse CSS N4 platform provide specialized architectures for agentic AI workloads across various domains.
Select Versal RF Series devices will be AMD's first adaptive SoCs with native UCIe 1.1 interfaces, allowing designers to…
Select Versal RF Series devices will be AMD's first adaptive SoCs with native UCIe 1.1 interfaces, allowing designers to co-package third-party chiplets.
RackCommander groups MaxLinear's USB UARTs, RS-485 transceivers, GPIO expanders, and power devices for rack-level management.
RackCommander groups MaxLinear's USB UARTs, RS-485 transceivers, GPIO expanders, and power devices for rack-level management.
Companies across industries are leveraging tech from NXP, MaxLinear and Nordic Semiconductor on automotive UWB,…
Companies across industries are leveraging tech from NXP, MaxLinear and Nordic Semiconductor on automotive UWB, accelerated OpenZFS storage, and low-power Bluetooth Mesh sensing.
In this edition of Business Shorts, we spotlight five announcements that show AI demand is reshaping everything from Wall…
In this edition of Business Shorts, we spotlight five announcements that show AI demand is reshaping everything from Wall Street financing to washing machines.
The new PolarFire FPGA-powered board from Microchip brings multiple sensors to Nvidia edge AI platforms.
The new PolarFire FPGA-powered board from Microchip brings multiple sensors to Nvidia edge AI platforms.
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