The new registering clock driver raises registered DIMM data rates to 9,600 MT/s for CPU-based servers.
The new registering clock driver raises registered DIMM data rates to 9,600 MT/s for CPU-based servers.
Siemens’ updated Fuse EDA AI Agent validates its own decisions against deterministic, physics-based EDA engines.
Siemens’ updated Fuse EDA AI Agent validates its own decisions against deterministic, physics-based EDA engines.
In this edition of Business Shorts, SK Group and Nvidia plan $500 billion in AI infrastructure, TDK and LG Innotek team…
In this edition of Business Shorts, SK Group and Nvidia plan $500 billion in AI infrastructure, TDK and LG Innotek team up on robotic sensing, and Micron locks in automotive memory supply.
The company's new, first-of-its-kind test software platform leverages AI to replace lengthy custom hardware or FPGA development.
The company's new, first-of-its-kind test software platform leverages AI to replace lengthy custom hardware or FPGA development.
The new modular 1RU cybersecurity test platform, delivers 400 Gbps throughput for validating modern AI and hyperscale…
The new modular 1RU cybersecurity test platform, delivers 400 Gbps throughput for validating modern AI and hyperscale network infrastructure under heavy traffic demands.
The PM1763 pairs a newly developed 4-nm controller with ninth-generation V-NAND, more than doubling the throughput of…
The PM1763 pairs a newly developed 4-nm controller with ninth-generation V-NAND, more than doubling the throughput of Samsung's fastest PCIe 5.0 enterprise drive.
New HBM, UFS, NAND, and EEPROM devices span the storage stack.
New HBM, UFS, NAND, and EEPROM devices span the storage stack.
Announced today, the new Ryzen AI Embedded X100 Series and Kria AI platform unify CPU, GPU, and NPU compute to provide…
Announced today, the new Ryzen AI Embedded X100 Series and Kria AI platform unify CPU, GPU, and NPU compute to provide the low-latency performance and deterministic control required for advanced physical AI robotics.
5G, AI, and quantum computing are pushing RF interconnects to their limits. Learn how engineers are evolving connector…
5G, AI, and quantum computing are pushing RF interconnects to their limits. Learn how engineers are evolving connector designs to ensure signal integrity in compact, high-speed systems.
Announced today, the new AuraStack AI Super Agent brings AI-enabled design to PCB design and advanced packaging, offering…
Announced today, the new AuraStack AI Super Agent brings AI-enabled design to PCB design and advanced packaging, offering a full-flow agentic environment that boosts engineering productivity by 15X.
The Titanium Edge FPGA family targets constrained edge AI with 50% lower power, compact SiP packages, high-speed MIPI…
The Titanium Edge FPGA family targets constrained edge AI with 50% lower power, compact SiP packages, high-speed MIPI I/O, and robust security/reliability features for intelligent systems.
IBM leveraged its nanostack architecture, a technique that "builds a chip like a city," to pack nearly 100 billion…
IBM leveraged its nanostack architecture, a technique that "builds a chip like a city," to pack nearly 100 billion transistors on a fingernail-sized chip.
Four deals target edge AI hardware and software, data center cooling, and embedded development tools.
Four deals target edge AI hardware and software, data center cooling, and embedded development tools.
The full-stack platform pairs the IGX Thor compute module with a safety-certified software stack and an accredited…
The full-stack platform pairs the IGX Thor compute module with a safety-certified software stack and an accredited inspection lab, with humanoid maker Agility as the first adopter.
OpenAI and Broadcom unveiled Jalapeño, OpenAI’s first custom AI accelerator designed from scratch for LLM inference,…
OpenAI and Broadcom unveiled Jalapeño, OpenAI’s first custom AI accelerator designed from scratch for LLM inference, developed from initial design to tape-out in 9 months.
Announced today, the new AMD Versal Premium Gen 2 MoP SoCs boost performance by integrating memory on-package. It cuts…
Announced today, the new AMD Versal Premium Gen 2 MoP SoCs boost performance by integrating memory on-package. It cuts board space by 60% while gaining 288 GB/s bandwidth and 15-year lifecycle.
Launched today, Synopsys’ ESUN IP solution slashes AI tail latency and eliminates networking bottlenecks to enable…
Launched today, Synopsys’ ESUN IP solution slashes AI tail latency and eliminates networking bottlenecks to enable seamless, scalable performance for modern AI infrastructure.
The new system-on-chip pairs a heterogeneous AI compute engine with a low-latency multi-camera image signal processor,…
The new system-on-chip pairs a heterogeneous AI compute engine with a low-latency multi-camera image signal processor, and can ship pre-integrated with emotion3D perception software.
The Korean unicorn packages four NPU dies with 144 GB of HBM3E and bets on an open software stack to serve large language…
The Korean unicorn packages four NPU dies with 144 GB of HBM3E and bets on an open software stack to serve large language models at lower cost per token.
The next-generation XR chipset delivers up to 48 TOPS of on-device AI and 4.4K-per-eye visuals. The device will debut…
The next-generation XR chipset delivers up to 48 TOPS of on-device AI and 4.4K-per-eye visuals. The device will debut this fall in XREAL's Project Aura glasses.
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