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How RISC-V Security Stacks Strengthen Computer Architecture

How RISC-V Security Stacks Strengthen Computer Architecture

In this article, Ted Speers of Microchip reflects on how RISC-V and its security stack offer a solution for the development of computer architecture and processor security.


Recent FPGAs Designed for C++ and Python, Harsh Environments, and ASIC Prototyping

Recent FPGAs Designed for C++ and Python, Harsh Environments, and ASIC Prototyping

These recently-released FPGAs aim to use accessible programming languages, withstand harsh environments, and support ASIC prototyping.


News Nov 23, 2019 by Robin Mitchell
ST Highlights New Temperature Sensors’ Accuracy—to Within 0.25°C

ST Highlights New Temperature Sensors’ Accuracy—to Within 0.25°C

The STTS22H from STMicroelectronics typically draws 0.5 µA in standby mode.


News Nov 19, 2019 by Gary Elinoff
Wind River Systems’ Open-source Cloud Platform Designed to Support 5G vRAN at the Edge

Wind River Systems’ Open-source Cloud Platform Designed to Support 5G vRAN at the Edge

The platform supports 5G applications at the edge through a Single Pane of Glass—the automated management of thousands of nodes.


News Nov 19, 2019 by Robin Mitchell
NXP’s 1-, 2-, 4- and 8-Channel Level Translators Optimized for Open-Drain Outputs

NXP’s 1-, 2-, 4- and 8-Channel Level Translators Optimized for Open-Drain Outputs

The NTS030x family of voltage level translators feature auto-direction sensing to eliminate the need for direction control.


News Nov 15, 2019 by Gary Elinoff
Xilinx Hails New Single-chip Microprocessors as the “World’s Highest Performing” for ADAS

Xilinx Hails New Single-chip Microprocessors as the “World’s Highest Performing” for ADAS

The single chip integrates 64-bit quad-core Arm Cortex-A53 and the dual-core Arm Cortex-R5 based processing system.


News Nov 15, 2019 by Lisa Boneta.
How Automated CDC Protocol Verification Accelerates Testing Processes

How Automated CDC Protocol Verification Accelerates Testing Processes

This article describes a methodology that automates set up, constraints, and results analysis as designs move from static CDC analysis to formal verification to simulation and avoid manual scripting efforts, thus reducing setup effort and errors.


ams Unveils Family of Digital Temperature Sensors for Tight Thermal Control

ams Unveils Family of Digital Temperature Sensors for Tight Thermal Control

Sized at only 1.5 mm2, members of the AS621x family offer a range of temperature accuracies for design flexibility.


News Nov 12, 2019 by Gary Elinoff
TI Rolls Out New ADC for Improved Voice Capture in Noisy, Far-field Environments

TI Rolls Out New ADC for Improved Voice Capture in Noisy, Far-field Environments

TI designed the new ADC to capture low-distortion audio recordings from far distances or in noisy environments.


News Nov 05, 2019 by Lisa Boneta.
How to Conduct Point Operations for Digital Image Processing: Using Look-up Tables

How to Conduct Point Operations for Digital Image Processing: Using Look-up Tables

Learn how to use look-up tables to conduct point operations in digital image processing.


Digital Image Processing: Point Operations to Adjust Brightness and Contrast

Digital Image Processing: Point Operations to Adjust Brightness and Contrast

In this article, we’ll first look at the basics of representing a digital image. Then, we’ll discuss some simple operations that allow us to adjust the brightness and contrast of an image. Finally, we’ll briefly look at the circuit implementation of these operations.


Microchip Dual Core Digital Signal Controllers | New Product Brief

Microchip Dual Core Digital Signal Controllers | New Product Brief

This New Product Brief (NPB) is part of a video series highlighting the features, applications, and technical specs of newly-released products.


New ARM IP Brings Down Costs of AI for Mainstream Products

New ARM IP Brings Down Costs of AI for Mainstream Products

Two new NPUs, along with a GPU and DPU, expand the scope of the doable for low-cost devices.


News Oct 28, 2019 by Gary Elinoff
Xilinx Zynq UltraScale+ MPSoC Evaluation Kit | New Product Brief

Xilinx Zynq UltraScale+ MPSoC Evaluation Kit | New Product Brief

This New Product Brief (NPB) is part of a video series highlighting the features, applications, and technical specs of newly-released products.


Learn About SAR ADCs: Architecture, Applications, and Support Circuitry

Learn About SAR ADCs: Architecture, Applications, and Support Circuitry

In this article, we’ll first review the basic architecture of a SAR ADC and then take a look at one of its common applications.


How to Build a Digital Input and Digital Control Using Microchip’s RN487x Bluetooth Module

How to Build a Digital Input and Digital Control Using Microchip’s RN487x Bluetooth Module

Learn how to use a Microchip module to prototype digital input and digital control peripherals.


Projects Oct 13, 2019 by Aaron Hanson
The Relationship Between Rise Time and Bandwidth in Digital Signals

The Relationship Between Rise Time and Bandwidth in Digital Signals

In this article, we’ll look at the relationship between the rise/fall time of a digital signal and its bandwidth.


Via Configurations for Connecting Decoupling Capacitors

Via Configurations for Connecting Decoupling Capacitors

In this article, we’ll focus on the different via configurations that can be used to connect a decoupling capacitor to the PCB power and ground planes.


Texas Instruments Evaluation Module Kit | New Product Brief

Texas Instruments Evaluation Module Kit | New Product Brief

This New Product Brief (NPB) is part of a video series highlighting the features, applications, and technical specs of newly-released products.


NXP Semiconductors SE050 Development Kit | New Product Brief

NXP Semiconductors SE050 Development Kit | New Product Brief

This New Product Brief (NPB) is part of a video series highlighting the features, applications, and technical specs of newly-released products.