Aiming to usurp Arm processors in size-constrained, compute hungry designs like wearables, SiFive has expanded its RISC-V “Performance” line of processors.
Aiming to usurp Arm processors in size-constrained, compute hungry designs like wearables, SiFive has expanded its RISC-V “Performance” line of processors.
Working around deadends to Moore's law, NeoLogic uses single-transistor logic to significantly decrease transistor count…
Working around deadends to Moore's law, NeoLogic uses single-transistor logic to significantly decrease transistor count in new VLSI designs.
EV companies are making chip design an in-house matter—regaining supply chain control and reducing reliance on…
EV companies are making chip design an in-house matter—regaining supply chain control and reducing reliance on third-party manufacturers.
Using a new Rust-based operating system, Google aims to secure ambient machine learning on embedded hardware.
Using a new Rust-based operating system, Google aims to secure ambient machine learning on embedded hardware.
With its new SoC, IBM hopes to pave the way for AI training and performance that can one day be 1,000 times faster than…
With its new SoC, IBM hopes to pave the way for AI training and performance that can one day be 1,000 times faster than modern solutions.
MediaTek’s new compute-intensive SoC is aimed at powering the next generation of mid-range Android 5G smartphones.
MediaTek’s new compute-intensive SoC is aimed at powering the next generation of mid-range Android 5G smartphones.
Researchers have developed a new technique to trap light and sound in waveguides to manipulate light in large-scale circuits.
Researchers have developed a new technique to trap light and sound in waveguides to manipulate light in large-scale circuits.
A collaboration between the two tech giants has resulted in improved data center compute hardware.
A collaboration between the two tech giants has resulted in improved data center compute hardware.
DARPA has tapped Intel to develop a low-cost link between current and future satellite constellations—effectively…
DARPA has tapped Intel to develop a low-cost link between current and future satellite constellations—effectively creating a "universal translator."
Wolfspeed, STMicroelectronics, SK Siltron, and Onsemi have independently announced new efforts to bolster the SiC supply…
Wolfspeed, STMicroelectronics, SK Siltron, and Onsemi have independently announced new efforts to bolster the SiC supply chain over the next five years.
For students back in college for their Fall semester—and anyone who needs a refresher—here’s the lowdown on our…
For students back in college for their Fall semester—and anyone who needs a refresher—here’s the lowdown on our top-notch textbooks, technical articles, and calculators for EE studies.
Using new materials, UPenn researchers recently demonstrated how analog compute-in-memory circuits can provide a…
Using new materials, UPenn researchers recently demonstrated how analog compute-in-memory circuits can provide a programmable solution for AI computing.
A new chip from STMicroelectronics is positioned as the first NFC Forum certified IC designed for use in automotive…
A new chip from STMicroelectronics is positioned as the first NFC Forum certified IC designed for use in automotive digital-key applications.
Alibaba's RISC-V SoC will power the ROMA development laptop, the industry’s first RISC-V offering.
Alibaba's RISC-V SoC will power the ROMA development laptop, the industry’s first RISC-V offering.
Researchers at Harvard claim to have developed the first ionic circuit based on a new ionic transistor technique.
Researchers at Harvard claim to have developed the first ionic circuit based on a new ionic transistor technique.
Researchers at KIST have developed high-performance and highly reliable artificial synaptic devices for next-generation…
Researchers at KIST have developed high-performance and highly reliable artificial synaptic devices for next-generation neuromorphic systems.
Eliminating cost/performance trade offs, Rohde & Schwarz has unveiled an oscilloscope that does 12-bit resolution across…
Eliminating cost/performance trade offs, Rohde & Schwarz has unveiled an oscilloscope that does 12-bit resolution across all sample speeds and a 4.5 million waveform/sec update rate.
The new partnership will give startups and research labs access to valuable R&D resources—particularly with open-source chips.
The new partnership will give startups and research labs access to valuable R&D resources—particularly with open-source chips.
At NVIDIA's most recent GTC, the company announced a new SoC to centralize the disparate computing requirements of modern…
At NVIDIA's most recent GTC, the company announced a new SoC to centralize the disparate computing requirements of modern vehicles.
Aiming to ease the challenges of 5G Open RAN (O-RAN) system designs, CEVA has unveiled a baseband IP platform for 5G RAN ASICs.
Aiming to ease the challenges of 5G Open RAN (O-RAN) system designs, CEVA has unveiled a baseband IP platform for 5G RAN ASICs.
Facebook
Google
GitHub
Linkedin