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Intel and AMD CPUs Prove Interoperable With Marvell’s CXL Portfolio

Intel and AMD CPUs Prove Interoperable With Marvell’s CXL Portfolio

Structera CXL interoperability will drive memory performance increases for data centers operating both AMD EPYC CPUs and 5th Gen Intel Xeon CPUs.


News May 08, 2025 by Duane Benson
Beyond Copper and Optical, a New Interconnect Eyes Next Gen Data Centers

Beyond Copper and Optical, a New Interconnect Eyes Next Gen Data Centers

Both copper and optical interconnects face limitations as choices for next gen data centers. Learn how a third option promises to enable scaling up AI clusters in data centers for years to come.


JEDEC Officially Releases HBM4 Memory Standard

JEDEC Officially Releases HBM4 Memory Standard

JEDEC’s HBM4 standard delivers up to 2 TB/s bandwidth, higher capacity (up to 64 GB per stack), and improved efficiency for AI and HPC.


News Apr 28, 2025 by Luke James
AMD Shakes Up Chip Architecture In New Server-Grade Embedded Processors

AMD Shakes Up Chip Architecture In New Server-Grade Embedded Processors

Unveiled today at Embedded World, Cisco and IBM have already adopted the CPUs with their “Zen 5” architecture, which offers server-grade performance and efficiency.


News Mar 12, 2025 by Jake Hertz
Can GaN Solve AI Data Center Power Needs in 2025?

Can GaN Solve AI Data Center Power Needs in 2025?

Gallium nitride’s market is expected to expand in AI data centers, electric vehicles, and other high-power needs


News Feb 18, 2025 by Jake Hertz
AI Inferencing in Data Centers: Breaking the Efficiency-Cost Tradeoff

AI Inferencing in Data Centers: Breaking the Efficiency-Cost Tradeoff

Training and inferencing comprise two crucial aspects of AI processing in datacenters. Learn the differences between the two, and the cost-efficiency issues involved.


Keysight Preps for LPDDR6 With Memory Design and Test Options

Keysight Preps for LPDDR6 With Memory Design and Test Options

Keysight's new solution tackles LPDDR6 workflows for end-to-end memory design and testing.


News Feb 04, 2025 by Duane Benson
Rethinking Computational Storage: Unlock the Processing Power of SSDs

Rethinking Computational Storage: Unlock the Processing Power of SSDs

Generic concepts of computational storage are a dead end, but targeted accelerators leveraging the massive on-board bandwidth of solid-state drives may benefit high-performance computing.


Easing Data Center Burdens, SiTime Launches Differential-Ended Oscillator

Easing Data Center Burdens, SiTime Launches Differential-Ended Oscillator

The new differential-ended oscillator is the company’s first specifically designed to optimize efficiency in AI data centers.


News Jan 16, 2025 by Jake Hertz
Industry Weighs in With 2025 Forecasts—Part 1: General Predictions

Industry Weighs in With 2025 Forecasts—Part 1: General Predictions

On this New Years Day, we share 2025 predictions from leading companies in our industry.


News Jan 01, 2025 by Jeff Child
What Are MRDIMMs? The Memory Tech Server Designers Are Talking About

What Are MRDIMMs? The Memory Tech Server Designers Are Talking About

A new memory technology has been sweeping the industry and bringing substantial performance gains with it.


News Nov 26, 2024 by Jake Hertz
Edge AI Demands Call For Optimized Storage Controller Chips

Edge AI Demands Call For Optimized Storage Controller Chips

AI will push the limits of PCs and smartphones. In turn, demands on storage controller chips will be intense. Learn how chip architectures and firmware schemes must be optimized for these AI workloads.


Microchip and Acacia Team Up To Optimize Terabit-Scale Data Center Links

Microchip and Acacia Team Up To Optimize Terabit-Scale Data Center Links

The two have joined forces to craft a fourth generation, terabit-scale Cloud/Data Center Interconnect (DCI) and metro transport network solution based on Microchip’s PHY and Acacia’s module.


News Aug 22, 2024 by Mike Falter
Memory Leaders Rise to Meet the Storage Challenges of AI

Memory Leaders Rise to Meet the Storage Challenges of AI

At this year's Future of Memory and Storage show, Microchip, Micron, and Samsung presented new memory solutions in the age of AI—from SSD controllers to LPDDR5X DRAM.


News Aug 08, 2024 by Jake Hertz
Crafting a Silicon Lifecycle Management Strategy for HPC and Data Centers

Crafting a Silicon Lifecycle Management Strategy for HPC and Data Centers

As data center computing and HPC advances, the stakes for ensuring reliability are high. Learn how to develop a silicon lifecycle management (SLM) strategy that ensures a successful future for your designs.


Phison Carves Out New SSD Brand Along With Inaugural Series

Phison Carves Out New SSD Brand Along With Inaugural Series

The new Pascari brand will provide SSDs for data-heavy enterprise applications.


News May 23, 2024 by Aaron Carman
Density Demands Push Memory Solutions to New Heights

Density Demands Push Memory Solutions to New Heights

From embedded systems to high-performance storage, the latest memory advancements are stacking skyward to maximize density and speed.


News Apr 29, 2024 by Aaron Carman
Rambus Presents First GDDR7 Memory Controller in the Age of AI 2.0

Rambus Presents First GDDR7 Memory Controller in the Age of AI 2.0

Today's processors support large-language models scaling to over a trillion parameters. Rambus is keeping up with this computational load with a new memory solution.


News Apr 24, 2024 by Aaron Carman
Microchip Expands Its Serial SRAM Devices to 2 Mb and 4 Mb

Microchip Expands Its Serial SRAM Devices to 2 Mb and 4 Mb

With speeds up to 143 MHz, the new 2-Mb and 4-Mb serial SRAM devices can be a lower-cost alternative to traditional parallel SRAM products.


News Apr 02, 2024 by Jake Hertz
Understanding How CXL 3.0 Links the Data Center Fabric

Understanding How CXL 3.0 Links the Data Center Fabric

The CXL data protocol is essential for meeting the interconnect needs of today’s data centers. Learn the key elements and benefits of this protocol, along with what’s new in CXL version 3.0.