In this article, Western Digital's Ted Marena explores the reasons companies have and the process they go through when integrating the open process instruction…
In this article, Western Digital's Ted Marena explores the reasons companies have and the process they go through when integrating the open process instruction set architecture RISC-V.
NSITEXE utilizes Synopsys’ development tools and IP to build a SoC (system-on-a-chip) for autonomous driving.
NSITEXE utilizes Synopsys’ development tools and IP to build a SoC (system-on-a-chip) for autonomous driving.
Composed of 35 billion transistors, the VU19P is the newest member of the 16 nm Virtex UltraScale+ family.
Composed of 35 billion transistors, the VU19P is the newest member of the 16 nm Virtex UltraScale+ family.
This article will discuss how to implement a shift register in Verilog. The register described can be synthesized and…
This article will discuss how to implement a shift register in Verilog. The register described can be synthesized and downloaded to an FPGA for test in actual hardware.
Security flaws can leave products vulnerable and give engineers sleepless nights. Recently, a new security flaw was found…
Security flaws can leave products vulnerable and give engineers sleepless nights. Recently, a new security flaw was found in Xilinx's Zynq UltraScale+ SoC devices' encrypt only secure boot.
The Alveo U50 adaptable accelerator fits into a PCIe slot, saves power, and improves throughput and latency.
The Alveo U50 adaptable accelerator fits into a PCIe slot, saves power, and improves throughput and latency.
Using Microsemi PolarFire FPGAs, the new program aims to enable compact, high-bandwidth, low-power system design.
Using Microsemi PolarFire FPGAs, the new program aims to enable compact, high-bandwidth, low-power system design.
Will open source hardware become as ubiquitous as open-source software, such as Linux and Android?
Will open source hardware become as ubiquitous as open-source software, such as Linux and Android?
The article discusses the benefits of a custom instruction for RISC-V and introduces the ACE framework.
The article discusses the benefits of a custom instruction for RISC-V and introduces the ACE framework.
Learn about a new board that uses an FPGA for serial communication in avionics applications.
Learn about a new board that uses an FPGA for serial communication in avionics applications.
Keysight's new PathWave software ambitiously aims to pack the modern EE's design experience into one program.
Keysight's new PathWave software ambitiously aims to pack the modern EE's design experience into one program.
This article will discuss the details of interfacing a basic 16x2 LCD module with an FPGA.
This article will discuss the details of interfacing a basic 16x2 LCD module with an FPGA.
This article will discuss the details of interfacing a basic 16x2 LCD module with an FPGA.
This article will discuss the details of interfacing a basic 16x2 LCD module with an FPGA.
Dialog Semi's new CMIC addresses image sensor performance for the high-competition mobile device market.
Dialog Semi's new CMIC addresses image sensor performance for the high-competition mobile device market.
What software languages are used with programmable logic controllers?
What software languages are used with programmable logic controllers?
After introducing structures, we’ll take a look at some of the important applications of this powerful data object.…
After introducing structures, we’ll take a look at some of the important applications of this powerful data object. Then, we’ll examine the C language syntax to declare a structure. Finally, we’ll briefly introduce the data alignment requirement. We’ll see that we may be able to reduce the size of a structure by simply rearranging the order of its members.
Working with IMUs can maddening for a variety of reasons, but what scares people the most is usually the math.
Working with IMUs can maddening for a variety of reasons, but what scares people the most is usually the math.
This article looks at real-time embedded systems including classifications, constraints, and design patterns.
This article looks at real-time embedded systems including classifications, constraints, and design patterns.
The 3D System In Package (SiP) FPGAs are also targeted for embedded and network applications.
The 3D System In Package (SiP) FPGAs are also targeted for embedded and network applications.
This article discusses the RISC-V-based SoC FPGA architecture for PolarFire SoC, which allows hard real-time applications…
This article discusses the RISC-V-based SoC FPGA architecture for PolarFire SoC, which allows hard real-time applications and Linux applications to coexist.