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Using Single-Ended Amplifiers in Low-Side Current Sensing: Error Sources and Layout Tips

Using Single-Ended Amplifiers in Low-Side Current Sensing: Error Sources and Layout Tips

Learn how to use single-ended amplifiers in low-side current sensing, including PCB layout tips and considerations, as well as a layout example based on an op-amp in the SOT23 package.


Intel’s Roadmap Targets Through-silicon Via Issues in Foveros Technology

Intel’s Roadmap Targets Through-silicon Via Issues in Foveros Technology

Knowing the issues with Foveros technology, Intel includes improvements, from interference to power consumption, into its roadmap. How is Intel aiming to improve this technology?


News Jul 29, 2021 by Jake Hertz
Simplifying Power IC Designs: 3 Companies Tackle Power Conversion Systems

Simplifying Power IC Designs: 3 Companies Tackle Power Conversion Systems

Simplifying designs are never easy, especially with power. So how did these three companies tackle simplifying power conversion systems?


Design Tips for Protecting High-Speed Interfaces

Design Tips for Protecting High-Speed Interfaces

In this second installment of the "Protect Your Ports! Top Design Tips to Keep Your Communications Connected" series, we explore what protecting high-speed interfaces looks like, including USB, HDMI, DisplayPort, and eSATA.


Examining the Negative Resistance of a Quartz Crystal Oscillator

Examining the Negative Resistance of a Quartz Crystal Oscillator

This article discusses how we can examine the oscillator circuit to make sure that it has sufficient “negative resistance” or “oscillation allowance”.


Assessing the Effect of Load Capacitance on the Frequency of a Quartz Crystal

Assessing the Effect of Load Capacitance on the Frequency of a Quartz Crystal

Learn how the load capacitance mismatch can “pull” the crystal to oscillate at a different frequency and how we can circumvent this problem.


Samsung Shoots for High-performance Computing with 2.5D High-bandwidth Memory

Samsung Shoots for High-performance Computing with 2.5D High-bandwidth Memory

Die stacking is becoming more commonplace with Samsung Electronics' next-generation 2.5D advanced package technology.


News May 10, 2021 by Adrian Gibbons
Why Physical Verification Is Only Getting Tougher With Advanced Nodes

Why Physical Verification Is Only Getting Tougher With Advanced Nodes

In the nanometer era, IC complexity grows faster than die areas. EDA companies are stepping up with tools to streamline physical verification.


Four Lessons an Adult Engineer Can Learn From Children’s Toys

Four Lessons an Adult Engineer Can Learn From Children’s Toys

Children’s toys aren’t just for children. Inside every toy, there are hundreds of hours of engineering experience just waiting to be discovered.


Increased Funds Could Catalyze TSMC’s 3D IC Research

Increased Funds Could Catalyze TSMC’s 3D IC Research

The world’s biggest contract chipmaker recently reported its best-ever quarterly financials along with its goals for delving into 3D IC research.


News Feb 22, 2021 by Luke James
PCB Layout Techniques for Reducing Harmonic Distortion of a Differential ADC Driver

PCB Layout Techniques for Reducing Harmonic Distortion of a Differential ADC Driver

Summary


How to Use Decoupling Capacitor Placement to Reduce Harmonic Distortion

How to Use Decoupling Capacitor Placement to Reduce Harmonic Distortion

Learn how to reduce second harmonic distortion by following some guidelines for placing decoupling capacitors in your PCB layout.


Understanding and Mitigating Motor Driver Board Parasitics through Simulation

Understanding and Mitigating Motor Driver Board Parasitics through Simulation

This article explores using PSpice for TI to simulate potential causes for parasitic effects in a motor-drive design and offers design tips to mitigate the negative effects common with high-power motor-drive systems.


As GaN Adoption Accelerates, an Industry Expert Offers Three Design Tips

As GaN Adoption Accelerates, an Industry Expert Offers Three Design Tips

GaN FETs aren't a perfect drop-in for their silicon counterparts—without board-level modifications, that is. We spoke with Alex Lidow, CEO of Efficient Power Conversion, to get his advice on how to make the transition.


News Feb 01, 2021 by Jake Hertz
Reducing Second Harmonic Distortion with Symmetrical PCB Layout

Reducing Second Harmonic Distortion with Symmetrical PCB Layout

Need a low-distortion ADC interface? In this article, we'll discuss how to reduce 2nd harmonic distortion by using symmetric PCB layout.


Introduction to Thermal Characterization Parameters

Introduction to Thermal Characterization Parameters

In this article, we’ll discuss another group of thermal data, called thermal characterization parameters denoted by the Greek letter Psi (Ψ).


Tips for Achieving Low-Frequency Precision and Improved Bandwidth in Photodiode Circuits

Tips for Achieving Low-Frequency Precision and Improved Bandwidth in Photodiode Circuits

This article continues our discussion of design techniques that help us to improve the performance of transimpedance amplifiers.


Choosing the Right Redriver or Retimer Device to Extend PCIe Protocol Signal Range

Choosing the Right Redriver or Retimer Device to Extend PCIe Protocol Signal Range

Redriver or retimer devices can extend the Peripheral Component Interface Express (PCIe®) protocol signal range. This article discusses how to select the best one for compute system and NVMe™ storage applications today and into the future.  


Junction-to-Case Thermal Resistance in Thermal Design

Junction-to-Case Thermal Resistance in Thermal Design

Learn about an important thermal metric for designing the interface between an IC package and a heat sink.


Theta JA (θ<sub>JA</sub>) Test Conditions for Assessing IC Package Thermal Design

Theta JA (θJA) Test Conditions for Assessing IC Package Thermal Design

Junction-to-ambient thermal resistance (or θJA) should be measured under standardized testing conditions. Learn about these details to use this thermal metric appropriately.