Micron says their LPDDR5 DRAM will allow 5G smartphones to have 6.4 Gbps peak processing while improving power efficiency by 20%.
Micron says their LPDDR5 DRAM will allow 5G smartphones to have 6.4 Gbps peak processing while improving power efficiency by 20%.
The Type 1SJ is designed for ISM bands ranging from 868 MHz to 916 MHz, including those employed in the US, Europe, and Asia.
The Type 1SJ is designed for ISM bands ranging from 868 MHz to 916 MHz, including those employed in the US, Europe, and Asia.
Some traditional semiconductor companies step into the end-user market and some do not. What companies are making this…
Some traditional semiconductor companies step into the end-user market and some do not. What companies are making this move and how does it affect the industry as a whole?
In this article, we will take a look at a few up-and-comers and discuss their promise in the silicon industry.
In this article, we will take a look at a few up-and-comers and discuss their promise in the silicon industry.
The ISL70005SEH, geared for satellite orbit, incorporates both a synchronous buck converter and a low dropout (LDO)…
The ISL70005SEH, geared for satellite orbit, incorporates both a synchronous buck converter and a low dropout (LDO) regulator in one monolithic IC.
Diligent’s Eclypse Z7 and Genesys ZU are designed to speed development for projects based on Xilinx’s Zynq-7000 and…
Diligent’s Eclypse Z7 and Genesys ZU are designed to speed development for projects based on Xilinx’s Zynq-7000 and Zynq Ultrascale+.
The QN9090 and QN9030 are Bluetooth low-energy (BLE) devices that integrate Arm Cortex-M4 CPUs.
The QN9090 and QN9030 are Bluetooth low-energy (BLE) devices that integrate Arm Cortex-M4 CPUs.
Micron claims that the new DDR5 will provide an 85% increase in memory performance in the next generation of server workloads.
Micron claims that the new DDR5 will provide an 85% increase in memory performance in the next generation of server workloads.
The K32 L2 MCUs are based on the Arm Cortex-M0+ core and feature multiple low-power modes.
The K32 L2 MCUs are based on the Arm Cortex-M0+ core and feature multiple low-power modes.
ST’s STPMIC1 is both a general-purpose system power management device and a companion chip for the STM32MP1 microprocessor.
ST’s STPMIC1 is both a general-purpose system power management device and a companion chip for the STM32MP1 microprocessor.
The new series of SPI EERAM memory chips were designed to retain data during power loss without the aid of external batteries.
The new series of SPI EERAM memory chips were designed to retain data during power loss without the aid of external batteries.
The M95M04 devices support 4Mbit capacity and allow devices to capture and store more data using the serial interface…
The M95M04 devices support 4Mbit capacity and allow devices to capture and store more data using the serial interface peripheral (SPI) bus.
Robust NVM (non-volatile memory) can now more easily co-exist with power functions on the same chip.
Robust NVM (non-volatile memory) can now more easily co-exist with power functions on the same chip.
ST's new secure payment SoCs aim to increase contactless performance and protection while reducing power demand.
ST's new secure payment SoCs aim to increase contactless performance and protection while reducing power demand.
As smart technology grows, developers are looking for more flexible network protocols. Here are some ways companies are…
As smart technology grows, developers are looking for more flexible network protocols. Here are some ways companies are combining, developing, or expanding protocols to broaden IoT applications.
Toshiba's newest family of SLC NAND memory products focuses on high transfer rates and providing an alternative to NOR memory.
Toshiba's newest family of SLC NAND memory products focuses on high transfer rates and providing an alternative to NOR memory.
Composed of 35 billion transistors, the VU19P is the newest member of the 16 nm Virtex UltraScale+ family.
Composed of 35 billion transistors, the VU19P is the newest member of the 16 nm Virtex UltraScale+ family.
The adoption of PCIe Gen4 and USB 3.2 interface technologies shows how controller chips are trying to match the capacity…
The adoption of PCIe Gen4 and USB 3.2 interface technologies shows how controller chips are trying to match the capacity and speed of flash memory they serve in SSD designs.
This week, Renesas released a new IoT development kit, the RX65N Wi-Fi Connectivity Cloud Kit. What can this kit do and…
This week, Renesas released a new IoT development kit, the RX65N Wi-Fi Connectivity Cloud Kit. What can this kit do and how can it help develop the latest IoT products?
The Alveo U50 adaptable accelerator fits into a PCIe slot, saves power, and improves throughput and latency.
The Alveo U50 adaptable accelerator fits into a PCIe slot, saves power, and improves throughput and latency.
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