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Designing to Protect 5G Macro Base Stations for High Reliability

In this article, learn about protecting three major base station systems, the baseband unit, the power supply, and the backup battery system.

March 10, 2022 by Todd Phillips, Littelfuse

An Example of Securing In-Cabin AI using TEE on a Secure FPGA SoC

This article discusses trusted execution environments — already used in a variety of connected devices — by showing how using TEE and an FPGA SoC can work in vehicle in-cabin AI.

July 28, 2020 by Katherine Hsu, Hex-Five Security

How Semiconductor Manufacturing Benefits from Smart Fabs

Semiconductor manufacturing is a complex industry and small improvements anywhere in the process can make a big difference to the bottom line. This article discusses the benefits of continually optimizing manufacturing for the semiconductor industry by introducing smart manufacturing solutions.

May 19, 2020 by Tim Hewitt, Siemens Digital Industries Software

The Role of Last-Level Cache Implementation for SoC Developers

There is a challenge for SoC developers to find ways to navigate the demand of memory in their design. This article looks at how a fourth, or last-level, cache can provide a solution.

May 12, 2020 by Kurt Shuler, Arteris

Design Solution for Automotive LCD Displays Utilizing LED Driver ICs

See how multi-channel automotive LED driver ICs implement backlight local dimming, bringing ‘true black’ to automotive LCD displays.

February 04, 2020 by Szukang Hsien, Maxim Integrated

The Importance of Reliability Verification in AI/ML Processors

With the adoption of artificial intelligence and machine learning in a wide variety of applications, reliability verification of AI/ML processors is critical since failures can have major consequences for the validity and legitimacy of AI/ML technology.

January 21, 2020 by Neel Natekar, Mentor

How RISC-V Security Stacks Strengthen Computer Architecture

In this article, Ted Speers of Microchip reflects on how RISC-V and its security stack offer a solution for the development of computer architecture and processor security.

November 26, 2019 by Ted Speers, Microchip

How Automated CDC Protocol Verification Accelerates Testing Processes

This article describes a methodology that automates set up, constraints, and results analysis as designs move from static CDC analysis to formal verification to simulation and avoid manual scripting efforts, thus reducing setup effort and errors.

November 14, 2019 by Kurt Takara, Mentor

Determining Copper Trace Thickness in PCB Design

This article discusses the issues surrounding trace-width calculation and provides a solid foundation for designing your next high-current net.

October 22, 2019 by Mark Hughes, Advanced Assembly

The Importance of Advanced ERC in Circuit Design

This article introduces and explores advanced ERC, highlighting its differences from traditional ERC and discussing how it can help create better circuit designs.

September 17, 2019 by Derong Yan, Mentor

The Journey of RISC-V Implementation

In this article, Western Digital's Ted Marena explores the reasons companies have and the process they go through when integrating the open process instruction set architecture RISC-V.

September 10, 2019 by Ted Marena, Western Digital

Meeting ASIL Compliance for ADAS with an Integrated SoC Power System Monitor

This article looks at the safety standard that governs ADAS features and the challenge in designing power monitoring systems to comply with this standard while introducing an automotive power monitor that has been certified to meet this standard.

September 06, 2019 by Michael Jackson, Maxim Integrated

RISC-V’s Role in Securing IoT-Connected Devices

RISC-V hardware offers additional security for IoT-connected embedded devices beyond software cybersecurity.

July 23, 2019 by Jothy Rosenberg, Dover Microsystems

Open Memory-Centric Architectures Enabled by RISC-V and OmniXtend

This article discusses technologies for memory-centric computing and introduces OmniXtend, a cache coherence protocol.

July 09, 2019 by Ted Marena, Western Digital

Enhancing Battery-Powered End Nodes Through Better Power Supply Design

Novel approaches to end node power supply design using switched-mode converters can enable a wireless end node to operate from a CR2032 lithium coin cell with up to +20 dBm transmit power.

June 25, 2019 by Josh Norem, Silicon Labs

Will Energy Harvesting Be What Fuels the Growth of the IoT?

This article explores the challenge of constantly powering the billions of devices that make up the IoT and how energy harvesting could be an effective solution.

May 28, 2019 by Robert Huntley, Mouser

Finding a Solution to Extend the Run-Time of a DSLR/DSLM Camera Design

This article presents the challenges of powering a digital camera and proposes a new design approach to save power while being more flexible.

May 16, 2019 by Sami Nijim, Maxim Integrated

An Introduction to SweRV, a RISC-V Core

This article introduces the RISC-V-based SweRV core, which builds on the classic five-stage RISC-V pipeline and allows up to two instructions per clock cycle.

May 14, 2019 by Zvonimir Bandić, Western Digital

Decreasing the Length of Design Cycle in Co-Designed SoCs with Renode

In this article, we explain how the use of open-source functional simulators like Antmicro’s Renode can be an integral part of hardware-software co-design efforts.

April 16, 2019 by Greg Sullivan, Dover Microsystems

Keeping RISC-V-Based Embedded System Design Flexible with Linux and Zephyr microPlatforms

This article discusses Foundries.io's microPlatforms which support Intel, Arm, and RISC-V architectures and are designed to avoid lock-in to specific hardware implementations.

March 28, 2019 by Trina Watt, Foundries.io