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HDLs Are Software (and It’s Crazy We’re Still Arguing About It)

HDLs Are Software (and It’s Crazy We’re Still Arguing About It)

HDLs are formal descriptions of behavior, making them software by definition. Modernizing these outdated tools is key to making FPGA development more accessible and productive for all engineers.


Decisions Ahead for the Next Generation of Advanced Packaging

Decisions Ahead for the Next Generation of Advanced Packaging

Advanced packaging is at a crossroads due to AI demand. Learn the four emerging paths—CoWoS, CoPoS, glass-core, and CoWoP—and how to choose the right one for your multi-die system design.


Breaking Down 50 Million Pins: A Smarter Way to Design 3D IC Packages

Breaking Down 50 Million Pins: A Smarter Way to Design 3D IC Packages

The shift to 3D ICs and chiplets demands automated, hierarchical design planning to manage exploding pin counts. Learn how Siemens EDA's Innovator3D IC addresses these challenges.


Nanoscale SCE: Electrostatic Challenges and FinFET/GAA Mitigation Solutions

Nanoscale SCE: Electrostatic Challenges and FinFET/GAA Mitigation Solutions

Learn how scaling beyond Dennard's limits triggered short-channel effects (SCE) and why transitioning from FinFET to Gate-All-Around (GAA) architectures is vital for 2 nm control.


FPGAs Need a New Future

FPGAs Need a New Future

FPGAs are limited by outdated proprietary software. Learn how embracing open-source tools is necessary to modernize FPGA development and unlock their full potential.


A New Generation of RF Switches at the Heart of 5G Systems

A New Generation of RF Switches at the Heart of 5G Systems

Learn how advanced RF MEMS switches with high linearity, low loss, and fast switching speeds are enabling modern cellular communication systems.


Why 90% of Component Compliance Issues Are Preventable (And How To Stop Them)

Why 90% of Component Compliance Issues Are Preventable (And How To Stop Them)

In today's rapidly evolving aerospace and defense landscape, component engineers face an unprecedented challenge: ensuring every part they specify meets stringent compliance requirements while maintaining mission readiness and program viability.


How Mature-Technology ASICs Can Give You the Edge

How Mature-Technology ASICs Can Give You the Edge

Learn how application-specific integrated circuits can enable companies to leverage their key IP and distinguish themselves from competitors who use off-the-shelf ICs.


An AI Revolution in Power Management Design for Embedded Systems

An AI Revolution in Power Management Design for Embedded Systems

Learn how PMIC.AI leverages custom LLM technology to transform how engineers design power supplies that meet the increasing complexity of multi-rail SoC systems.


Post-Quantum Cryptography—Securing Semiconductors in a Post-Quantum World

Post-Quantum Cryptography—Securing Semiconductors in a Post-Quantum World

Quantum computing advances are exciting, but they’re also a looming threat to securing ICs, driving the need for Post-Quantum Cryptography (PQC). Learn about PQC, how it’s being implemented, and the legislation involved.


Harnessing the Power of a Software-Based Image Signal Processing Approach

Harnessing the Power of a Software-Based Image Signal Processing Approach

There are numerous advantages to leveraging a software-based image signal processor (ISP) approach. Learn the advantages and the solutions available to implement this technology.


Last-Time Buy Notifications For Your ASICs? How To Make the Most of It

Last-Time Buy Notifications For Your ASICs? How To Make the Most of It

This article explores the history of the 600 nm process, the reasons behind its phase-out, and what the industry has to look forward to as smaller, more efficient chips become the new standard.


The 150-Year-Old Principle at the Root of Secure Silicon and Software

The 150-Year-Old Principle at the Root of Secure Silicon and Software

Learn how open source silicon can provide better security than traditional measures like obscurity, but only if employed correctly, managed well, and backed with appropriate resources.


Speeding Derivative SoC Designs With Networks-on-Chips

Speeding Derivative SoC Designs With Networks-on-Chips

With the help of a case study, we examine how adopting NoC technology can significantly improve the process of updating existing chip designs.


Applying IP Customization to Improve AI Chips: A Case Study

Applying IP Customization to Improve AI Chips: A Case Study

For your next chip design, should you select a design-services provider with the ability to create custom fundamental IP blocks, including standard cells and libraries? This article will help you answer this question.


How Will Angstrom-Scale Chips Advance the Electronics Industry?

How Will Angstrom-Scale Chips Advance the Electronics Industry?

Angstrom-scale ICs will require innovation across the entire semiconductor ecosystem: This will include advances in both the hardware (transistors, power distribution, and connection of multi-die systems) and tools (EDA tools with AI/ML and silicon life-cycle management).


Getting the Most Out of USB-C/PD System Designs

Getting the Most Out of USB-C/PD System Designs

USB-C/PD brings significant improvements to the USB connectivity world. In this article, learn how this technology simplifies system designs and the solutions available to implement USB-C/PD.


Silicon Lifecycle Management: Enabling Silicon Visibility Through Intelligent Analysis

Silicon Lifecycle Management: Enabling Silicon Visibility Through Intelligent Analysis

Learn about silicon lifecycle management (SLM), what it is, the EDA challenges involved, how it relates to SoC systems, and its overall benefits.


Designing to Protect 5G Macro Base Stations for High Reliability

Designing to Protect 5G Macro Base Stations for High Reliability

In this article, learn about protecting three major base station systems, the baseband unit, the power supply, and the backup battery system.


An Example of Securing In-Cabin AI using TEE on a Secure FPGA SoC

An Example of Securing In-Cabin AI using TEE on a Secure FPGA SoC

This article discusses trusted execution environments — already used in a variety of connected devices — by showing how using TEE and an FPGA SoC can work in vehicle in-cabin AI.