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Spinning Disks Sputter as AI Heats up Data

Spinning Disks Sputter as AI Heats up Data

AI-driven data demands are outpacing traditional HDDs. System developers must migrate to high-performance, secure, and efficient NVMe SSDs to scale for AI workloads.


Boost the Power Delivery Potential of USB-C Ports with Protection Switches

Boost the Power Delivery Potential of USB-C Ports with Protection Switches

Learn how innovative technologies like protection switches will be crucial in transitioning to high-power delivery of USB-C ports.


The Hidden Cooling Bottleneck Inside Liquid-Cooled AI Data Centers

The Hidden Cooling Bottleneck Inside Liquid-Cooled AI Data Centers

Learn how liquid cooling eliminates system airflow, creating a hidden thermal bottleneck for 'left-behind' components like memory and SSDs. Targeted micro-cooling is required to restore system balance.


Solving the QLC NAND Flash SSD Scaling Challenge

Solving the QLC NAND Flash SSD Scaling Challenge

Learn how to solve QLC NAND's endurance, ECC, and performance issues for hyperscale. The approach blends a PCIe Gen5 controller with hardware-accelerated LDPC, PerformaShape QoS, and more.


Beyond Copper and Optical, a New Interconnect Eyes Next Gen Data Centers

Beyond Copper and Optical, a New Interconnect Eyes Next Gen Data Centers

Both copper and optical interconnects face limitations as choices for next gen data centers. Learn how a third option promises to enable scaling up AI clusters in data centers for years to come.


AI Inferencing in Data Centers: Breaking the Efficiency-Cost Tradeoff

AI Inferencing in Data Centers: Breaking the Efficiency-Cost Tradeoff

Training and inferencing comprise two crucial aspects of AI processing in datacenters. Learn the differences between the two, and the cost-efficiency issues involved.


Rethinking Computational Storage: Unlock the Processing Power of SSDs

Rethinking Computational Storage: Unlock the Processing Power of SSDs

Generic concepts of computational storage are a dead end, but targeted accelerators leveraging the massive on-board bandwidth of solid-state drives may benefit high-performance computing.


Edge AI Demands Call For Optimized Storage Controller Chips

Edge AI Demands Call For Optimized Storage Controller Chips

AI will push the limits of PCs and smartphones. In turn, demands on storage controller chips will be intense. Learn how chip architectures and firmware schemes must be optimized for these AI workloads.


Crafting a Silicon Lifecycle Management Strategy for HPC and Data Centers

Crafting a Silicon Lifecycle Management Strategy for HPC and Data Centers

As data center computing and HPC advances, the stakes for ensuring reliability are high. Learn how to develop a silicon lifecycle management (SLM) strategy that ensures a successful future for your designs.


Understanding How CXL 3.0 Links the Data Center Fabric

Understanding How CXL 3.0 Links the Data Center Fabric

The CXL data protocol is essential for meeting the interconnect needs of today’s data centers. Learn the key elements and benefits of this protocol, along with what’s new in CXL version 3.0.


System Challenges of Generative AI Inference Acceleration

System Challenges of Generative AI Inference Acceleration

When you look under the hood of generative AI processing, the system design challenges are many. Learn how efficiency, power consumption, and memory issues all come into play.


Increasing the Accessibility of Machine Learning at the Edge

Increasing the Accessibility of Machine Learning at the Edge

"Edge intelligence" is becoming more accessible—even to those designers without formal data science training—as new hardware becomes available.


Minimizing Stepper Motor Noise and Vibration in Precision Motion Control Applications

Minimizing Stepper Motor Noise and Vibration in Precision Motion Control Applications

Stepper motors work well in a wide range of applications but can struggle with torque ripple and current distortion issues. Learn about QuietStep, a proprietary algorithm from Allegro MicroSystems, as a possible solution. 


Choosing the Right Redriver or Retimer Device to Extend PCIe Protocol Signal Range

Choosing the Right Redriver or Retimer Device to Extend PCIe Protocol Signal Range

Redriver or retimer devices can extend the Peripheral Component Interface Express (PCIe®) protocol signal range. This article discusses how to select the best one for compute system and NVMe™ storage applications today and into the future.  


An Example of Securing In-Cabin AI using TEE on a Secure FPGA SoC

An Example of Securing In-Cabin AI using TEE on a Secure FPGA SoC

This article discusses trusted execution environments — already used in a variety of connected devices — by showing how using TEE and an FPGA SoC can work in vehicle in-cabin AI.


The Importance of Reliability Verification in AI/ML Processors

The Importance of Reliability Verification in AI/ML Processors

With the adoption of artificial intelligence and machine learning in a wide variety of applications, reliability verification of AI/ML processors is critical since failures can have major consequences for the validity and legitimacy of AI/ML technology.


The Journey of RISC-V Implementation

The Journey of RISC-V Implementation

In this article, Western Digital's Ted Marena explores the reasons companies have and the process they go through when integrating the open process instruction set architecture RISC-V.


Open Memory-Centric Architectures Enabled by RISC-V and OmniXtend

Open Memory-Centric Architectures Enabled by RISC-V and OmniXtend

This article discusses technologies for memory-centric computing and introduces OmniXtend, a cache coherence protocol.


Introduction to the RISC-V Instruction Set CKB-VM and its Requirements

Introduction to the RISC-V Instruction Set CKB-VM and its Requirements

The Nervos CKB-Virtual Machine (CKB-VM) is a RISC-V instruction set based VM for executing smart contracts on Nervos CKB, written in Rust.


Making the Cloud More Powerful: Xilinx FPGAs and Adaptive Workload Acceleration

Making the Cloud More Powerful: Xilinx FPGAs and Adaptive Workload Acceleration

Historically, FPGAs have been challenging to work with. To combat that reputation, Xilinx developed programmable devices that simplify—and accelerate—the implementation of customized hardware development.