AI-driven data demands are outpacing traditional HDDs. System developers must migrate to high-performance, secure, and efficient NVMe SSDs to scale for AI workloads.
AI-driven data demands are outpacing traditional HDDs. System developers must migrate to high-performance, secure, and efficient NVMe SSDs to scale for AI workloads.
Learn how innovative technologies like protection switches will be crucial in transitioning to high-power delivery of USB-C ports.
Learn how innovative technologies like protection switches will be crucial in transitioning to high-power delivery of USB-C ports.
Learn how liquid cooling eliminates system airflow, creating a hidden thermal bottleneck for 'left-behind' components…
Learn how liquid cooling eliminates system airflow, creating a hidden thermal bottleneck for 'left-behind' components like memory and SSDs. Targeted micro-cooling is required to restore system balance.
Learn how to solve QLC NAND's endurance, ECC, and performance issues for hyperscale. The approach blends a PCIe Gen5…
Learn how to solve QLC NAND's endurance, ECC, and performance issues for hyperscale. The approach blends a PCIe Gen5 controller with hardware-accelerated LDPC, PerformaShape QoS, and more.
Both copper and optical interconnects face limitations as choices for next gen data centers. Learn how a third option…
Both copper and optical interconnects face limitations as choices for next gen data centers. Learn how a third option promises to enable scaling up AI clusters in data centers for years to come.
Training and inferencing comprise two crucial aspects of AI processing in datacenters. Learn the differences between the…
Training and inferencing comprise two crucial aspects of AI processing in datacenters. Learn the differences between the two, and the cost-efficiency issues involved.
Generic concepts of computational storage are a dead end, but targeted accelerators leveraging the massive on-board…
Generic concepts of computational storage are a dead end, but targeted accelerators leveraging the massive on-board bandwidth of solid-state drives may benefit high-performance computing.
AI will push the limits of PCs and smartphones. In turn, demands on storage controller chips will be intense. Learn how…
AI will push the limits of PCs and smartphones. In turn, demands on storage controller chips will be intense. Learn how chip architectures and firmware schemes must be optimized for these AI workloads.
As data center computing and HPC advances, the stakes for ensuring reliability are high. Learn how to develop a silicon…
As data center computing and HPC advances, the stakes for ensuring reliability are high. Learn how to develop a silicon lifecycle management (SLM) strategy that ensures a successful future for your designs.
The CXL data protocol is essential for meeting the interconnect needs of today’s data centers. Learn the key elements…
The CXL data protocol is essential for meeting the interconnect needs of today’s data centers. Learn the key elements and benefits of this protocol, along with what’s new in CXL version 3.0.
When you look under the hood of generative AI processing, the system design challenges are many. Learn how efficiency,…
When you look under the hood of generative AI processing, the system design challenges are many. Learn how efficiency, power consumption, and memory issues all come into play.
"Edge intelligence" is becoming more accessible—even to those designers without formal data science training—as new…
"Edge intelligence" is becoming more accessible—even to those designers without formal data science training—as new hardware becomes available.
Stepper motors work well in a wide range of applications but can struggle with torque ripple and current distortion…
Stepper motors work well in a wide range of applications but can struggle with torque ripple and current distortion issues. Learn about QuietStep, a proprietary algorithm from Allegro MicroSystems, as a possible solution.
Redriver or retimer devices can extend the Peripheral Component Interface Express (PCIe®) protocol signal range. This…
Redriver or retimer devices can extend the Peripheral Component Interface Express (PCIe®) protocol signal range. This article discusses how to select the best one for compute system and NVMe™ storage applications today and into the future.
This article discusses trusted execution environments — already used in a variety of connected devices — by showing…
This article discusses trusted execution environments — already used in a variety of connected devices — by showing how using TEE and an FPGA SoC can work in vehicle in-cabin AI.
With the adoption of artificial intelligence and machine learning in a wide variety of applications, reliability…
With the adoption of artificial intelligence and machine learning in a wide variety of applications, reliability verification of AI/ML processors is critical since failures can have major consequences for the validity and legitimacy of AI/ML technology.
In this article, Western Digital's Ted Marena explores the reasons companies have and the process they go through when…
In this article, Western Digital's Ted Marena explores the reasons companies have and the process they go through when integrating the open process instruction set architecture RISC-V.
This article discusses technologies for memory-centric computing and introduces OmniXtend, a cache coherence protocol.
This article discusses technologies for memory-centric computing and introduces OmniXtend, a cache coherence protocol.
The Nervos CKB-Virtual Machine (CKB-VM) is a RISC-V instruction set based VM for executing smart contracts on Nervos CKB,…
The Nervos CKB-Virtual Machine (CKB-VM) is a RISC-V instruction set based VM for executing smart contracts on Nervos CKB, written in Rust.
Historically, FPGAs have been challenging to work with. To combat that reputation, Xilinx developed programmable devices…
Historically, FPGAs have been challenging to work with. To combat that reputation, Xilinx developed programmable devices that simplify—and accelerate—the implementation of customized hardware development.