HDLs are formal descriptions of behavior, making them software by definition. Modernizing these outdated tools is key to making FPGA development more accessible…
HDLs are formal descriptions of behavior, making them software by definition. Modernizing these outdated tools is key to making FPGA development more accessible and productive for all engineers.
FPGAs are limited by outdated proprietary software. Learn how embracing open-source tools is necessary to modernize FPGA…
FPGAs are limited by outdated proprietary software. Learn how embracing open-source tools is necessary to modernize FPGA development and unlock their full potential.
From fine-tuning the output of a solar farm to stabilizing a complex electric grid, FPGAs provide the ultra-fast,…
From fine-tuning the output of a solar farm to stabilizing a complex electric grid, FPGAs provide the ultra-fast, efficient computing needed to maximize energy efficiency.
In today's rapidly evolving aerospace and defense landscape, component engineers face an unprecedented challenge:…
In today's rapidly evolving aerospace and defense landscape, component engineers face an unprecedented challenge: ensuring every part they specify meets stringent compliance requirements while maintaining mission readiness and program viability.
Generative AI tools like ChatGPT have had a huge impact in numerous sectors of society. As engineers, it’s helpful for…
Generative AI tools like ChatGPT have had a huge impact in numerous sectors of society. As engineers, it’s helpful for us to understand the computing technology that makes it possible.
Learn about the benefits of time-sensitive networking (TSN) and how engineers use it to ensure that an industrial system…
Learn about the benefits of time-sensitive networking (TSN) and how engineers use it to ensure that an industrial system is ready for the future. This article focuses on three members of the set of TSN standards.
In this article, we discuss some key security threats to be aware of when designing for the IoT, important security…
In this article, we discuss some key security threats to be aware of when designing for the IoT, important security functions, and how protecting these designs is becoming easier with advances in security ICs.
This article explains how to use an NTC or a PTC thermistor with an ADC, along with the various process techniques to…
This article explains how to use an NTC or a PTC thermistor with an ADC, along with the various process techniques to convert ADC measured results into a usable temperature value.
This article discusses trusted execution environments — already used in a variety of connected devices — by showing…
This article discusses trusted execution environments — already used in a variety of connected devices — by showing how using TEE and an FPGA SoC can work in vehicle in-cabin AI.
In this article, Western Digital's Ted Marena explores the reasons companies have and the process they go through when…
In this article, Western Digital's Ted Marena explores the reasons companies have and the process they go through when integrating the open process instruction set architecture RISC-V.
The article discusses the benefits of a custom instruction for RISC-V and introduces the ACE framework.
The article discusses the benefits of a custom instruction for RISC-V and introduces the ACE framework.
This article discusses the RISC-V-based SoC FPGA architecture for PolarFire SoC, which allows hard real-time applications…
This article discusses the RISC-V-based SoC FPGA architecture for PolarFire SoC, which allows hard real-time applications and Linux applications to coexist.
Learn about CKB-virtual machine (VM), which is a RISC-V instruction set that utilizes RISC-V's open-source instruction…
Learn about CKB-virtual machine (VM), which is a RISC-V instruction set that utilizes RISC-V's open-source instruction set architecture.
This article explores the benefits behind RISC-V's open-source hardware model, discussing it's longevity, portability,…
This article explores the benefits behind RISC-V's open-source hardware model, discussing it's longevity, portability, and reliability.
Historically, FPGAs have been challenging to work with. To combat that reputation, Xilinx developed programmable devices…
Historically, FPGAs have been challenging to work with. To combat that reputation, Xilinx developed programmable devices that simplify—and accelerate—the implementation of customized hardware development.
SoCs with programmable logic are an essential element of real-time embedded vision systems. Designers can capitalize on…
SoCs with programmable logic are an essential element of real-time embedded vision systems. Designers can capitalize on the power and efficiency of Xilinx's Zynq Ultrascale+ MPSoC devices to implement their designs using Avnet's Embedded Vision Kits and the Xilinx reVISION stack.
MicroBlaze is a 32-bit soft RISC processor core, created to accelerate the development of cost-sensitive, high-volume…
MicroBlaze is a 32-bit soft RISC processor core, created to accelerate the development of cost-sensitive, high-volume applications that traditionally required one or more microcontrollers.
An exploration of how new mid-range FPGAs can perform bridging functions for Ethernet and Gigabit Ethernet (GbE) links…
An exploration of how new mid-range FPGAs can perform bridging functions for Ethernet and Gigabit Ethernet (GbE) links while addressing the issue of low power consumption.
In this multipart industrial IoT series, we will break down and explore the fundamental aspects of the edge node…
In this multipart industrial IoT series, we will break down and explore the fundamental aspects of the edge node interpretation within the larger IoT framework: sensing, measuring, interpreting, and connecting data, with additional consideration for power management and security.
Until recently, developers integrating a FPGA fabric with a microcontroller were severely limited in their choice of IP…
Until recently, developers integrating a FPGA fabric with a microcontroller were severely limited in their choice of IP licensing options. Using open-source tools with a RISC-V core in a FPGA is present a solution to that problem.