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The Importance of Reliability Verification in AI/ML Processors

With the adoption of artificial intelligence and machine learning in a wide variety of applications, reliability verification of AI/ML processors is critical since failures can have major consequences for the validity and legitimacy of AI/ML technology.

January 21, 2020 by Neel Natekar, Mentor

How RISC-V Security Stacks Strengthen Computer Architecture

In this article, Ted Speers of Microchip reflects on how RISC-V and its security stack offer a solution for the development of computer architecture and processor security.

November 26, 2019 by Ted Speers, Microchip

Open Memory-Centric Architectures Enabled by RISC-V and OmniXtend

This article discusses technologies for memory-centric computing and introduces OmniXtend, a cache coherence protocol.

July 09, 2019 by Ted Marena, Western Digital

How Data-Centric Applications Can Capitalize on RISC-V Processor Innovation

This article explores how RISC-V, combined with open-source collaboration and standards, is enabling innovation and purpose-built technologies among software engineers, system architects, CTOs, and board designers. It also touches on the possible impact that RISC-V and open source trends could have on the future of data-centric application experiences.

March 20, 2019 by Ted Marena, Western Digital

How to Utilize the RISC-V Instruction Set CKB-VM

Part 3 of this series shows examples of the CKB-VM, a RISC-V instruction set based VM, in action in three different ways.

March 19, 2019 by Xuejie Xiao, Nervos

CKB-VM as a RISC-V Instruction Set: Inspiration, Design, and Benefits

Learn about CKB-virtual machine (VM), which is a RISC-V instruction set that utilizes RISC-V's open-source instruction set architecture.

March 12, 2019 by Xuejie Xiao, Nervos

Introduction to the RISC-V Instruction Set CKB-VM and its Requirements

The Nervos CKB-Virtual Machine (CKB-VM) is a RISC-V instruction set based VM for executing smart contracts on Nervos CKB, written in Rust.

March 05, 2019 by Xuejie Xiao, Nervos

RISC-V: Opening a New Era of Innovation for Embedded Design

This article explores the benefits behind RISC-V's open-source hardware model, discussing it's longevity, portability, and reliability.

June 27, 2018 by Ted Marena, Microsemi

Utilizing Xilinx’s MicroBlaze in FPGA Design

MicroBlaze is a 32-bit soft RISC processor core, created to accelerate the development of cost-sensitive, high-volume applications that traditionally required one or more microcontrollers.

April 27, 2018 by Xilinx

RISC-V: Transforming the Development of SoC Devices that Combine FPGAs and Microcontrollers

Until recently, developers integrating a FPGA fabric with a microcontroller were severely limited in their choice of IP licensing options. Using open-source tools with a RISC-V core in a FPGA is present a solution to that problem.

September 06, 2017 by Ted Marena, Microsemi