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Spinning Disks Sputter as AI Heats up Data

Spinning Disks Sputter as AI Heats up Data

AI-driven data demands are outpacing traditional HDDs. System developers must migrate to high-performance, secure, and efficient NVMe SSDs to scale for AI workloads.


Enabling High-Performance AI PC Web Cameras Using eUSB2V2 Version of USB

Enabling High-Performance AI PC Web Cameras Using eUSB2V2 Version of USB

Learn how eUSB2V2-based enabling technology for next-generation AI PC web cameras delivers the high bandwidth, local intelligence, and power efficiency required for emerging edge AI use cases.


The Shift to Edge AI Requires Connector Choices to be Re-Examined

The Shift to Edge AI Requires Connector Choices to be Re-Examined

Edge AI moves is moving processing to harsh environments like UAVs and robotics. Connectors must be rugged, compact, and high-power to meet SWaP-C constraints and ensure safety/reliability.


Edge AI Development Is a Lifecycle Problem

Edge AI Development Is a Lifecycle Problem

Edge AI success is limited by memory and power. Fragmented tools cause failures. Learn how a cohesive, full-lifecycle approach unifying design and deployment is essential for scalable systems.


The Hidden Cooling Bottleneck Inside Liquid-Cooled AI Data Centers

The Hidden Cooling Bottleneck Inside Liquid-Cooled AI Data Centers

Learn how liquid cooling eliminates system airflow, creating a hidden thermal bottleneck for 'left-behind' components like memory and SSDs. Targeted micro-cooling is required to restore system balance.


How Neuromorphic Chips are Revolutionizing the Edge

How Neuromorphic Chips are Revolutionizing the Edge

Neuromorphic Edge AI chips mark a fundamental departure from traditional silicon, utilizing brain-inspired, event-driven architectures to enable real-time inference within milliwatt-level power budgets.


Decisions Ahead for the Next Generation of Advanced Packaging

Decisions Ahead for the Next Generation of Advanced Packaging

Advanced packaging is at a crossroads due to AI demand. Learn the four emerging paths—CoWoS, CoPoS, glass-core, and CoWoP—and how to choose the right one for your multi-die system design.


Breaking the Thermal Wall Using Monolithic Ceramic Cooling for Power Electronics

Breaking the Thermal Wall Using Monolithic Ceramic Cooling for Power Electronics

Learn how monolithic ceramic cooling using Selective Laser Reaction Sintering (SLRS) eliminates the "thermal wall" in high-density power electronics by creating single-piece, reliable heat exchangers.


Case Study: A Low-Cost, Low-Profile 6kW, 800 V to 12.5 V DC-DC for AI Power

Case Study: A Low-Cost, Low-Profile 6kW, 800 V to 12.5 V DC-DC for AI Power

Learn how GaN technology enables a low-cost, low-profile 6 kW, 800 VDC to 12.5 VDC converter using an ISOP LLC topology. This meets the design needs of next-gen, MW-scale AI server infrastructure.


Defending the Digital Highway: Cybersecurity for Software-Defined Vehicles

Defending the Digital Highway: Cybersecurity for Software-Defined Vehicles

Learn how evolving regulations, lifecycle security strategies, and quantum-ready cryptography are reshaping automotive cybersecurity.


The New Moore’s Law: Why Optical Computing Could Redefine Scaling for AI

The New Moore’s Law: Why Optical Computing Could Redefine Scaling for AI

Optical computing is the "New Moore's Law" for AI. It solves electronic scaling limits, offering higher speed, lower power, and efficiency gains proportional to problem size for matrix operations.


The Configurable Matrix Computer: A New Alternative to the von Neumann Architecture

The Configurable Matrix Computer: A New Alternative to the von Neumann Architecture

Learn how this new type of AI processor provides a 100x improvement in power and performance over conventional GPUs or MCUs.


Edge AI’s Next Battlefield: Development Tools

Edge AI’s Next Battlefield: Development Tools

Learn why the best silicon is useless without the right AI developer tools.


Solving the QLC NAND Flash SSD Scaling Challenge

Solving the QLC NAND Flash SSD Scaling Challenge

Learn how to solve QLC NAND's endurance, ECC, and performance issues for hyperscale. The approach blends a PCIe Gen5 controller with hardware-accelerated LDPC, PerformaShape QoS, and more.


How Machine Learning Is Shrinking to Fit the Sensor Node

How Machine Learning Is Shrinking to Fit the Sensor Node

Learn how “right-sized” machine learning enables edge devices to make critical decisions locally, improving reliability and reducing reliance on cloud connectivity in remote, volatile environments.


Using Worst-Case Execution Time Analysis to Uncover Hidden Timing Couplings

Using Worst-Case Execution Time Analysis to Uncover Hidden Timing Couplings

Learn about "hidden" timing couplings in multicore systems that cause unexpected interference, significantly impacting Worst-Case Execution Time (WCET) even for independent tasks.


Packing More Brains Into Buds: Multi-Feature AI on Tiny Silicon

Packing More Brains Into Buds: Multi-Feature AI on Tiny Silicon

Outfitting earbuds with more AI can be a challenge. Learn how compression techniques like sparsity, quantization, and memory-aware scheduling can help smooth the way.


Common Antenna Integration Challenges and How to Handle Them

Common Antenna Integration Challenges and How to Handle Them

The design of RF systems requires engineers to face complex challenges. Learn how automated tools augmented with AI are becoming available to help with this.


Design for the Future: How UALink Interconnects Empower Next-Gen AI Systems

Design for the Future: How UALink Interconnects Empower Next-Gen AI Systems

Learn how UALink offers an open, high-speed interconnect for AI accelerators, that enables scalable, low-latency, and energy-efficient AI systems for next-gen workloads.


How Mature-Technology ASICs Can Give You the Edge

How Mature-Technology ASICs Can Give You the Edge

Learn how application-specific integrated circuits can enable companies to leverage their key IP and distinguish themselves from competitors who use off-the-shelf ICs.