At Intel's 2021 Architecture Day, CEO Pat Gelsinger called the company's new computing technology "magic." Here are a few highlights from the event.
At Intel's 2021 Architecture Day, CEO Pat Gelsinger called the company's new computing technology "magic." Here are a few highlights from the event.
Marvell’s newest 5 nm data processing unit (DPU), the OCTEON 10, offers 3x improvement over the previous generation…
Marvell’s newest 5 nm data processing unit (DPU), the OCTEON 10, offers 3x improvement over the previous generation along with the newest ARMv9 Core.
RISC-V, the open-source instruction set architecture, is making inroads against industry giants, with the support of the…
RISC-V, the open-source instruction set architecture, is making inroads against industry giants, with the support of the RISC-V Foundation.
ARM Vision 2021 defines the company's roadmap for the next ten years of specialized computing with the ARMv9-A.
ARM Vision 2021 defines the company's roadmap for the next ten years of specialized computing with the ARMv9-A.
This New Product Brief (NPB) is part of a video series highlighting the features, applications, and technical specs of…
This New Product Brief (NPB) is part of a video series highlighting the features, applications, and technical specs of newly-released products.
John von Neumann has revolutionized the world of computing through his work on the Manhattan Project, the von Neumann…
John von Neumann has revolutionized the world of computing through his work on the Manhattan Project, the von Neumann (Princeton) Architecture, and the first IAS computer.
This New Product Brief (NPB) is part of a video series highlighting the features, applications, and technical specs of…
This New Product Brief (NPB) is part of a video series highlighting the features, applications, and technical specs of newly-released products.
Researchers at the University of Surrey have come up with a new type of transistor that offers linear behavior and huge upside.
Researchers at the University of Surrey have come up with a new type of transistor that offers linear behavior and huge upside.
On the heels of RISC-V’s 10th birthday, let's explore the history of RISC-V from its inception to today.
On the heels of RISC-V’s 10th birthday, let's explore the history of RISC-V from its inception to today.
Ultrasound, with nearly a century of technological history, has seen its third major technological breakthrough coming…
Ultrasound, with nearly a century of technological history, has seen its third major technological breakthrough coming out of North Carolina State.
In this video we will examine the internal circuitry of an operational amplifier. A thorough analysis of any…
In this video we will examine the internal circuitry of an operational amplifier. A thorough analysis of any professional-quality op-amp would be far too complicated for an introductory video tutorial, but if we focus on the overall architecture and a few specific design techniques, we can learn quite a bit about op-amp functionality without getting lost in the details.
As the co-founders of RISC-V, SiFive's level-up on processors could have significant implications for custom SoC design.
As the co-founders of RISC-V, SiFive's level-up on processors could have significant implications for custom SoC design.
Laser frequency combs small enough to fit on an IC have significant implications for frequency measurement and communications.
Laser frequency combs small enough to fit on an IC have significant implications for frequency measurement and communications.
The joint efforts of GigaDevice and IAR Systems may speed the development time when working with RISC-V.
The joint efforts of GigaDevice and IAR Systems may speed the development time when working with RISC-V.
It all starts with firmware that runs a routing protocol, allowing routers to pay each other for bandwidth and automate…
It all starts with firmware that runs a routing protocol, allowing routers to pay each other for bandwidth and automate network configuration.
Recently, a study into the architecture has been presented by members of the Wireless Networking and AI&ML research…
Recently, a study into the architecture has been presented by members of the Wireless Networking and AI&ML research groups and described as a “new standard” for telecommunications networks.
Remote work during this pandemic has shed light anew on the virtues of RISC-V, which has just gotten more accessible.
Remote work during this pandemic has shed light anew on the virtues of RISC-V, which has just gotten more accessible.
The collaboration is fuelled by the desire to develop open-source standards that simplify security design for hardware…
The collaboration is fuelled by the desire to develop open-source standards that simplify security design for hardware developers and enhance the security of IoT devices.
This article discusses the Perceptron configuration that we will use for our experiments with neural-network training and…
This article discusses the Perceptron configuration that we will use for our experiments with neural-network training and classification, and we’ll also look at the related topic of bias nodes.
The Core-V Chassis evaluation SoC will feature a CV64A 64-bit core and a CV32E 32-bit coprocessor core as well as 3D and 2D GPUs.
The Core-V Chassis evaluation SoC will feature a CV64A 64-bit core and a CV32E 32-bit coprocessor core as well as 3D and 2D GPUs.