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Highlights of Intel’s 2021 Architecture Day—a Computing-centric Event

Highlights of Intel’s 2021 Architecture Day—a Computing-centric Event

At Intel's 2021 Architecture Day, CEO Pat Gelsinger called the company's new computing technology "magic." Here are a few highlights from the event.


News Aug 24, 2021 by Jake Hertz
Marvell’s OCTEON 10: The First DPU To Use Neoverse N2 ARMv9 Architecture

Marvell’s OCTEON 10: The First DPU To Use Neoverse N2 ARMv9 Architecture

Marvell’s newest 5 nm data processing unit (DPU), the OCTEON 10, offers 3x improvement over the previous generation along with the newest ARMv9 Core.


News Jul 07, 2021 by Adrian Gibbons
A RISC-V Future? SiFive and Andes Aim to Shake Up the Processor Industry

A RISC-V Future? SiFive and Andes Aim to Shake Up the Processor Industry

RISC-V, the open-source instruction set architecture, is making inroads against industry giants, with the support of the RISC-V Foundation.


News Jun 25, 2021 by Adrian Gibbons
ARMv9: the Long-awaited High-Performance Computing Architecture

ARMv9: the Long-awaited High-Performance Computing Architecture

ARM Vision 2021 defines the company's roadmap for the next ten years of specialized computing with the ARMv9-A.


News Apr 01, 2021 by Adrian Gibbons
STMICROELECTRONICS BlueNRG-LP BLUETOOTH® Low Energy Wireless SoC | New Product Brief

STMICROELECTRONICS BlueNRG-LP BLUETOOTH® Low Energy Wireless SoC | New Product Brief

This New Product Brief (NPB) is part of a video series highlighting the features, applications, and technical specs of newly-released products.


John von Neumann: From the Manhattan Project to the Princeton Architecture

John von Neumann: From the Manhattan Project to the Princeton Architecture

John von Neumann has revolutionized the world of computing through his work on the Manhattan Project, the von Neumann (Princeton) Architecture, and the first IAS computer.


News Feb 27, 2021 by Kimber Wymore
NORDIC SEMICONDUCTOR nRF52820 Bluetooth® 5.2 System-on-Chip (SoC) | New Product Brief

NORDIC SEMICONDUCTOR nRF52820 Bluetooth® 5.2 System-on-Chip (SoC) | New Product Brief

This New Product Brief (NPB) is part of a video series highlighting the features, applications, and technical specs of newly-released products.


A New Multimodal Architecture Said to Redefine the Way Transistors Work

A New Multimodal Architecture Said to Redefine the Way Transistors Work

Researchers at the University of Surrey have come up with a new type of transistor that offers linear behavior and huge upside.


News Nov 02, 2020 by Jake Hertz
RISC-V Celebrates 10 Years of Open-Source ISA

RISC-V Celebrates 10 Years of Open-Source ISA

On the heels of RISC-V’s 10th birthday, let's explore the history of RISC-V from its inception to today.


News Aug 25, 2020 by Jake Hertz
Ultrasound Receiver Architecture Undergoes a Seismic Shift

Ultrasound Receiver Architecture Undergoes a Seismic Shift

Ultrasound, with nearly a century of technological history, has seen its third major technological breakthrough coming out of North Carolina State.


News Aug 20, 2020 by Adrian Gibbons
Architecture and Design Techniques of Op-Amps

Architecture and Design Techniques of Op-Amps

In this video we will examine the internal circuitry of an operational amplifier. A thorough analysis of any professional-quality op-amp would be far too complicated for an introductory video tutorial, but if we focus on the overall architecture and a few specific design techniques, we can learn quite a bit about op-amp functionality without getting lost in the details.


SiFive, Co-Founder of RISC-V, Unveils Major Upgrades to RISC-V-Based Processors

SiFive, Co-Founder of RISC-V, Unveils Major Upgrades to RISC-V-Based Processors

As the co-founders of RISC-V, SiFive's level-up on processors could have significant implications for custom SoC design.


News Jul 25, 2020 by Vanessa Samuel
Revolutionizing Telecommunications Applications with Chip-Based Microcombs

Revolutionizing Telecommunications Applications with Chip-Based Microcombs

Laser frequency combs small enough to fit on an IC have significant implications for frequency measurement and communications.


News Jun 26, 2020 by Gary Elinoff
A New Partnership Brings Professional Dev Tools to RISC-V Microcontrollers

A New Partnership Brings Professional Dev Tools to RISC-V Microcontrollers

The joint efforts of GigaDevice and IAR Systems may speed the development time when working with RISC-V.


News Jun 04, 2020 by Gary Elinoff
ISP in a Box: Althea Reimagines Mesh Network Systems

ISP in a Box: Althea Reimagines Mesh Network Systems

It all starts with firmware that runs a routing protocol, allowing routers to pay each other for bandwidth and automate network configuration.


News May 22, 2020 by Kayla Matthews
The International Telecommunication Union Announces a New Architecture That Incorporates MI Mechanisms

The International Telecommunication Union Announces a New Architecture That Incorporates MI Mechanisms

Recently, a study into the architecture has been presented by members of the Wireless Networking and AI&ML research groups and described as a “new standard” for telecommunications networks.


News May 21, 2020 by Luke James
COVID-19 Puts Spotlight on Open-Source RISC-V Cores, IP

COVID-19 Puts Spotlight on Open-Source RISC-V Cores, IP

Remote work during this pandemic has shed light anew on the virtues of RISC-V, which has just gotten more accessible.


RISC-V International Partners with GlobalPlatform to Simplify Security Design for IoT Devices and Processors

RISC-V International Partners with GlobalPlatform to Simplify Security Design for IoT Devices and Processors

The collaboration is fuelled by the desire to develop open-source standards that simplify security design for hardware developers and enhance the security of IoT devices.


News May 15, 2020 by Luke James
Neural Network Architecture for a Python Implementation

Neural Network Architecture for a Python Implementation

This article discusses the Perceptron configuration that we will use for our experiments with neural-network training and classification, and we’ll also look at the related topic of bias nodes.


OpenHW Group Announces Multi-core Evaluation SoC Based on the NXP iMX Platform

OpenHW Group Announces Multi-core Evaluation SoC Based on the NXP iMX Platform

The Core-V Chassis evaluation SoC will feature a CV64A 64-bit core and a CV32E 32-bit coprocessor core as well as 3D and 2D GPUs.


News Dec 13, 2019 by Cabe Atwell