Latest RISC-V Articles and Videos

Groq, a semiconductor startup with software roots, has developed a new processing unit with a unique architecture that…

Groq, a semiconductor startup with software roots, has developed a new processing unit with a unique architecture that offers inference solutions for AI acceleration.

In this article, Ted Speers of Microchip reflects on how RISC-V and its security stack offer a solution for the…

In this article, Ted Speers of Microchip reflects on how RISC-V and its security stack offer a solution for the development of computer architecture and processor security.

This New Product Brief (NPB) is part of a video series highlighting the features, applications, and technical specs of…

This New Product Brief (NPB) is part of a video series highlighting the features, applications, and technical specs of newly-released products.

In this article, we’ll first review the basic architecture of a SAR ADC and then take a look at one of its common applications.

In this article, we’ll first review the basic architecture of a SAR ADC and then take a look at one of its common applications.

In this article, Western Digital's Ted Marena explores the reasons companies have and the process they go through when…

In this article, Western Digital's Ted Marena explores the reasons companies have and the process they go through when integrating the open process instruction set architecture RISC-V.

Alibaba is set to produce the next generation of Chinese processors with the RISC-V instead of Arm architecture.

Alibaba is set to produce the next generation of Chinese processors with the RISC-V instead of Arm architecture.

RISC-V hardware offers additional security for IoT-connected embedded devices beyond software cybersecurity.

RISC-V hardware offers additional security for IoT-connected embedded devices beyond software cybersecurity.

This article discusses technologies for memory-centric computing and introduces OmniXtend, a cache coherence protocol.

This article discusses technologies for memory-centric computing and introduces OmniXtend, a cache coherence protocol.

Will open source hardware become as ubiquitous as open-source software, such as Linux and Android?

Will open source hardware become as ubiquitous as open-source software, such as Linux and Android?

The article discusses the benefits of a custom instruction for RISC-V and introduces the ACE framework.

The article discusses the benefits of a custom instruction for RISC-V and introduces the ACE framework.

This article will introduce the Advanced Microcontroller Bus Architecture (AMBA), an open standard for SoC designs.

This article will introduce the Advanced Microcontroller Bus Architecture (AMBA), an open standard for SoC designs.

This article introduces the RISC-V-based SweRV core, which builds on the classic five-stage RISC-V pipeline and allows up…

This article introduces the RISC-V-based SweRV core, which builds on the classic five-stage RISC-V pipeline and allows up to two instructions per clock cycle.

In this article, we explain how the use of open-source functional simulators like Antmicro’s Renode can be an integral…

In this article, we explain how the use of open-source functional simulators like Antmicro’s Renode can be an integral part of hardware-software co-design efforts.

Learn more about the Arm computer architecture, including ISA, execution states, and processor families.

Learn more about the Arm computer architecture, including ISA, execution states, and processor families.

This article discusses Foundries.io's microPlatforms which support Intel, Arm, and RISC-V architectures and are designed…

This article discusses Foundries.io's microPlatforms which support Intel, Arm, and RISC-V architectures and are designed to avoid lock-in to specific hardware implementations.

This article discusses the RISC-V-based SoC FPGA architecture for PolarFire SoC, which allows hard real-time applications…

This article discusses the RISC-V-based SoC FPGA architecture for PolarFire SoC, which allows hard real-time applications and Linux applications to coexist.

In this article we’ll look at the defining characteristics of these extremely popular ICs, and then we’ll explore the…

In this article we’ll look at the defining characteristics of these extremely popular ICs, and then we’ll explore the internal architecture.

These roadshows will showcase innovative RISC-V implementations from leading RISC innovators.

These roadshows will showcase innovative RISC-V implementations from leading RISC innovators.

This article explores how RISC-V, combined with open-source collaboration and standards, is enabling innovation and…

This article explores how RISC-V, combined with open-source collaboration and standards, is enabling innovation and purpose-built technologies among software engineers, system architects, CTOs, and board designers. It also touches on the possible impact that RISC-V and open source trends could have on the future of data-centric application experiences.