The PicoScope 5000E Series delivers a 22-µV RMS noise floor and up to 5-GS/s sampling in a USB-C-powered package.
The PicoScope 5000E Series delivers a 22-µV RMS noise floor and up to 5-GS/s sampling in a USB-C-powered package.
Called Gleanmer, the 16-nm system-on-chip swaps memory-hungry voxels for compact Gaussian “blobs” to map and navigate…
Called Gleanmer, the 16-nm system-on-chip swaps memory-hungry voxels for compact Gaussian “blobs” to map and navigate at roughly 6 mW.
U-blox has introduced the MAYA-W5 and NORA-W5 Wi-Fi 6 module families for industrial and IoT applications, designed and…
U-blox has introduced the MAYA-W5 and NORA-W5 Wi-Fi 6 module families for industrial and IoT applications, designed and manufactured in Europe.
The full-stack platform pairs the IGX Thor compute module with a safety-certified software stack and an accredited…
The full-stack platform pairs the IGX Thor compute module with a safety-certified software stack and an accredited inspection lab, with humanoid maker Agility as the first adopter.
The 33-mm, coin-cell-powered board includes dual antennas, multiprotocol wireless support, and an integrated sensor suite.
The 33-mm, coin-cell-powered board includes dual antennas, multiprotocol wireless support, and an integrated sensor suite.
Intel's 1980 microcontroller put a CPU, memory, timers, and serial I/O on a single chip. It’s an architecture that…
Intel's 1980 microcontroller put a CPU, memory, timers, and serial I/O on a single chip. It’s an architecture that still ships inside billions of devices.
The programmable Hall switch can detect up to four positions using a single device.
The programmable Hall switch can detect up to four positions using a single device.
OpenAI and Broadcom unveiled Jalapeño, OpenAI’s first custom AI accelerator designed from scratch for LLM inference,…
OpenAI and Broadcom unveiled Jalapeño, OpenAI’s first custom AI accelerator designed from scratch for LLM inference, developed from initial design to tape-out in 9 months.
Announced today, the new AMD Versal Premium Gen 2 MoP SoCs boost performance by integrating memory on-package. It cuts…
Announced today, the new AMD Versal Premium Gen 2 MoP SoCs boost performance by integrating memory on-package. It cuts board space by 60% while gaining 288 GB/s bandwidth and 15-year lifecycle.
Launched today, Synopsys’ ESUN IP solution slashes AI tail latency and eliminates networking bottlenecks to enable…
Launched today, Synopsys’ ESUN IP solution slashes AI tail latency and eliminates networking bottlenecks to enable seamless, scalable performance for modern AI infrastructure.
The new system-on-chip pairs a heterogeneous AI compute engine with a low-latency multi-camera image signal processor,…
The new system-on-chip pairs a heterogeneous AI compute engine with a low-latency multi-camera image signal processor, and can ship pre-integrated with emotion3D perception software.
The Korean unicorn packages four NPU dies with 144 GB of HBM3E and bets on an open software stack to serve large language…
The Korean unicorn packages four NPU dies with 144 GB of HBM3E and bets on an open software stack to serve large language models at lower cost per token.
The new reference design leverages EPC’s monolithic GaN module to deliver an ultra-compact, high-efficiency motor drive…
The new reference design leverages EPC’s monolithic GaN module to deliver an ultra-compact, high-efficiency motor drive solution specifically optimized for humanoid robotics and drones.
The 120 MHz GD32E512 is optimized for high-speed optical modules and the 72 MHz GD32E252 takes on low-speed optical modules.
The 120 MHz GD32E512 is optimized for high-speed optical modules and the 72 MHz GD32E252 takes on low-speed optical modules.
The next-generation XR chipset delivers up to 48 TOPS of on-device AI and 4.4K-per-eye visuals. The device will debut…
The next-generation XR chipset delivers up to 48 TOPS of on-device AI and 4.4K-per-eye visuals. The device will debut this fall in XREAL's Project Aura glasses.
The family replaces cascaded switch architectures, reducing component count, improving signal integrity, and supporting…
The family replaces cascaded switch architectures, reducing component count, improving signal integrity, and supporting operation from 50 MHz to 10 GHz.
Cirrus Logic introduced nine new 32-bit ADCs, DACs, and codecs for pro and prosumer audio systems with 115 dB dynamic range.
Cirrus Logic introduced nine new 32-bit ADCs, DACs, and codecs for pro and prosumer audio systems with 115 dB dynamic range.
The new wideband shunts and the high-voltage differential probe are designed to enable engineers to extend measurement…
The new wideband shunts and the high-voltage differential probe are designed to enable engineers to extend measurement coverage from precision low-current analysis to high voltage power validation.
Research teams at EPFL, Harvard, and UC San Diego each reported photonic devices that shrink or repurpose light-based hardware.
Research teams at EPFL, Harvard, and UC San Diego each reported photonic devices that shrink or repurpose light-based hardware.
Announced today, the all-in-one VL53L9CX combines stacked BSI SPAD technology, metasurface optics, and on-chip processing…
Announced today, the all-in-one VL53L9CX combines stacked BSI SPAD technology, metasurface optics, and on-chip processing to deliver dense spatial awareness directly to small microcontrollers.