The new processors promise 3:1 rack consolidation, 4.2x rack-level performance gains, and 2.6x performance per watt gains.
The new processors promise 3:1 rack consolidation, 4.2x rack-level performance gains, and 2.6x performance per watt gains.
To meet the mounting power demands in data centers and AI servers, Infineon has revealed new MOSFETs that improve…
To meet the mounting power demands in data centers and AI servers, Infineon has revealed new MOSFETs that improve efficiency at lower voltages.
With a bit-flip lifetime exceeding seven minutes, the Boson 4 cat-qubit quantum chip bests other superconducting qubits.
With a bit-flip lifetime exceeding seven minutes, the Boson 4 cat-qubit quantum chip bests other superconducting qubits.
With the goal of decarbonizing AI server racks, the new series of power supply units (PSUs) focus on efficiency, ranging…
With the goal of decarbonizing AI server racks, the new series of power supply units (PSUs) focus on efficiency, ranging from 3 kW to 12 kW.
FinalSpark has unveiled Neuroplatform, a pioneering approach to "bioprocessing" with wetware computing and organoid intelligence.
FinalSpark has unveiled Neuroplatform, a pioneering approach to "bioprocessing" with wetware computing and organoid intelligence.
The new Pascari brand will provide SSDs for data-heavy enterprise applications.
The new Pascari brand will provide SSDs for data-heavy enterprise applications.
In this roundup, we highlight some announcements from the International Supercomputer Conference that shed light on the…
In this roundup, we highlight some announcements from the International Supercomputer Conference that shed light on the state of exascale computing.
Google's sixth-generation tensor processing unit (TPU) stole the company's I/O developer conference stage with its…
Google's sixth-generation tensor processing unit (TPU) stole the company's I/O developer conference stage with its higher-than-ever computing performance.
Micron, Polar Semiconductor, and digital twin proposals are slated to receive CHIPS Act funding to help secure the U.S.…
Micron, Polar Semiconductor, and digital twin proposals are slated to receive CHIPS Act funding to help secure the U.S. semiconductor supply chain.
From embedded systems to high-performance storage, the latest memory advancements are stacking skyward to maximize…
From embedded systems to high-performance storage, the latest memory advancements are stacking skyward to maximize density and speed.
Today's processors support large-language models scaling to over a trillion parameters. Rambus is keeping up with this…
Today's processors support large-language models scaling to over a trillion parameters. Rambus is keeping up with this computational load with a new memory solution.
Embedded World was rife with major hardware releases. Here are a few unique software packages designed to simplify the…
Embedded World was rife with major hardware releases. Here are a few unique software packages designed to simplify the development experience.
The new SiTime data center clock chip delivers 10x higher performance than quartz crystal-based devices in half the space.
The new SiTime data center clock chip delivers 10x higher performance than quartz crystal-based devices in half the space.
With speeds up to 143 MHz, the new 2-Mb and 4-Mb serial SRAM devices can be a lower-cost alternative to traditional…
With speeds up to 143 MHz, the new 2-Mb and 4-Mb serial SRAM devices can be a lower-cost alternative to traditional parallel SRAM products.
Eight and a half years after acquiring Altera, Intel has spun off the FPGA division as an independent subsidiary.
Eight and a half years after acquiring Altera, Intel has spun off the FPGA division as an independent subsidiary.
Ahead of the IEEE 1.6 TbE standard, Synopsys has developed a complete 1.6 T solution that includes multi-rate,…
Ahead of the IEEE 1.6 TbE standard, Synopsys has developed a complete 1.6 T solution that includes multi-rate, multi-channel 1.6 T Ethernet MAC and PCS controllers, 224-G Ethernet PHY IP, and verification IP.
In our final ISSCC spotlight, we explore Samsung's paper on a high-capacity, high-speed DDR5 memory that implements a…
In our final ISSCC spotlight, we explore Samsung's paper on a high-capacity, high-speed DDR5 memory that implements a monolithic-die-based 32-Gb DDR5 with 8 Gb/s/pin—all without leaving the 10 nm process.
AMD engineers presented their latest innovation this week at ISSCC, showing the world how they realized the Zen 4c CPU core.
AMD engineers presented their latest innovation this week at ISSCC, showing the world how they realized the Zen 4c CPU core.
The five new parts are 1,200-V, full-bridge quad MOSFETs with current ratings from 27–102 A and RDS(on) values ranging…
The five new parts are 1,200-V, full-bridge quad MOSFETs with current ratings from 27–102 A and RDS(on) values ranging from 20 to 80 mΩ.
During his long and remarkably productive career, Jay Forrester accumulated an impressive list of innovations and…
During his long and remarkably productive career, Jay Forrester accumulated an impressive list of innovations and achievements in electrical engineering, social science, and business management.