Industries like aerospace and defense are only raising the bar on IC requirements. Here are a few recently announced tools helping IC designers meet the task.
Industries like aerospace and defense are only raising the bar on IC requirements. Here are a few recently announced tools helping IC designers meet the task.
Seeing these advantages of using field programmable gate array (FPGA) technology, this week is Intel's FPGA Day, which…
Seeing these advantages of using field programmable gate array (FPGA) technology, this week is Intel's FPGA Day, which just announced a collab to further FPGA-based infrastructure processing units (IPUs).
The Cadence Integrity 3D-IC platform brings together a suite of advanced floor planning and validation software to…
The Cadence Integrity 3D-IC platform brings together a suite of advanced floor planning and validation software to develop 3D-stacked SoC designs.
In the nanometer era, IC complexity grows faster than die areas. EDA companies are stepping up with tools to streamline…
In the nanometer era, IC complexity grows faster than die areas. EDA companies are stepping up with tools to streamline physical verification.
Analysts predict that DDR5 will dominate the DRAM market in coming years. How do you calibrate DDR for peak memory performance?
Analysts predict that DDR5 will dominate the DRAM market in coming years. How do you calibrate DDR for peak memory performance?
The two RF powerhouses have teamed up to create a flexible radio platform that addresses 5G network design challenges.
The two RF powerhouses have teamed up to create a flexible radio platform that addresses 5G network design challenges.
One of the trickiest aspects of chip design is figuring out how to pack more circuitry into a smaller footprint while…
One of the trickiest aspects of chip design is figuring out how to pack more circuitry into a smaller footprint while maintaining power, speed, and energy efficiency.
Osaka University researchers have built a new device that can be customized by the user for maximum efficiency in AI applications.
Osaka University researchers have built a new device that can be customized by the user for maximum efficiency in AI applications.
NSITEXE utilizes Synopsys’ development tools and IP to build a SoC (system-on-a-chip) for autonomous driving.
NSITEXE utilizes Synopsys’ development tools and IP to build a SoC (system-on-a-chip) for autonomous driving.
This article will look at the techniques that Vivado employs to accelerate design implementation.
This article will look at the techniques that Vivado employs to accelerate design implementation.
This article will look at some of the most important features of the Xilinx Vivado Design Suite which accelerates the…
This article will look at some of the most important features of the Xilinx Vivado Design Suite which accelerates the "time to integration" of the design procedure.
SiFive announces an open-source SoC platform based on RISC-V and NVDLA architectures.
SiFive announces an open-source SoC platform based on RISC-V and NVDLA architectures.
AAC writer, Chantelle Dubois, had a chance to speak one-on-one with the head of SiFive's DesignShare program about the…
AAC writer, Chantelle Dubois, had a chance to speak one-on-one with the head of SiFive's DesignShare program about the benefits to IP sharing, and what he believes will be important for the future of SoC design.
Last year, Intel acquired FPGA-focused Altera. Now they've announced the intention to create a hybrid between their…
Last year, Intel acquired FPGA-focused Altera. Now they've announced the intention to create a hybrid between their well-known CPUs and FPGAs.Last year, Intel acquired FPGA-focused Altera. Now they've announced a new line of hybrid chips that combine FPGAs with their well-known CPUs, achieving a goal set in 2010.
Cadence Design Systems will be dropping the curtain on some exciting new technology solutions this year at TSMC 2016 in…
Cadence Design Systems will be dropping the curtain on some exciting new technology solutions this year at TSMC 2016 in San Jose on March 15th.
Here's a rundown of three boards best suited for beginning to intermediate FPGA designers. Some boards cost thousands of…
Here's a rundown of three boards best suited for beginning to intermediate FPGA designers. Some boards cost thousands of dollars, and it’s unrealistic to compare a board of that cost to a board that a hobbyist would likely choose, so this comparison looks at three popular boards in the sub-$90 price point.
The acquisition will couple Intel’s leading-edge products and manufacturing process with Altera’s leading…
The acquisition will couple Intel’s leading-edge products and manufacturing process with Altera’s leading field-programmable gate array (FPGA) technology. The combination is expected to enable new classes of products that meet customer needs in the data center and Internet of Things (IoT) market segments. Intel plans to offer Altera’s FPGA products with Intel Xeon® processors as highly customized, integrated products. The companies also expect to enhance Altera’s products through design and manufacturing improvements resulting from Intel’s integrated device manufacturing model.