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Around the Industry: Examples of How Complex ICs Require Complex Design Tools

Around the Industry: Examples of How Complex ICs Require Complex Design Tools

Industries like aerospace and defense are only raising the bar on IC requirements. Here are a few recently announced tools helping IC designers meet the task.


News Dec 21, 2021 by Ikimi .O
Intel’s FPGA Day Unveils 3 Collabs to Create More FPGA-based IPU Designs

Intel’s FPGA Day Unveils 3 Collabs to Create More FPGA-based IPU Designs

Seeing these advantages of using field programmable gate array (FPGA) technology, this week is Intel's FPGA Day, which just announced a collab to further FPGA-based infrastructure processing units (IPUs).


News Dec 09, 2021 by Jake Hertz
Cadence Releases First ECAD Platform Dedicated to 3D System Design

Cadence Releases First ECAD Platform Dedicated to 3D System Design

The Cadence Integrity 3D-IC platform brings together a suite of advanced floor planning and validation software to develop 3D-stacked SoC designs.


News Oct 12, 2021 by Adrian Gibbons
Why Physical Verification Is Only Getting Tougher With Advanced Nodes

Why Physical Verification Is Only Getting Tougher With Advanced Nodes

In the nanometer era, IC complexity grows faster than die areas. EDA companies are stepping up with tools to streamline physical verification.


Boosting Memory Performance in the Age of DDR5: An Intro to DDR Training Modes

Boosting Memory Performance in the Age of DDR5: An Intro to DDR Training Modes

Analysts predict that DDR5 will dominate the DRAM market in coming years. How do you calibrate DDR for peak memory performance?


News Nov 06, 2020 by Dr. Steve Arar
Intel and Analog Devices Link Up to Streamline 5G Network Design

Intel and Analog Devices Link Up to Streamline 5G Network Design

The two RF powerhouses have teamed up to create a flexible radio platform that addresses 5G network design challenges.


News Aug 05, 2020 by Jake Hertz
Google Proposes AI as Solution for Speedier AI Chip Design

Google Proposes AI as Solution for Speedier AI Chip Design

One of the trickiest aspects of chip design is figuring out how to pack more circuitry into a smaller footprint while maintaining power, speed, and energy efficiency.


News Apr 06, 2020 by Luke James
Osaka University Develops an FPGA Computing Device for Maximal Optimization of AI Tasks

Osaka University Develops an FPGA Computing Device for Maximal Optimization of AI Tasks

Osaka University researchers have built a new device that can be customized by the user for maximum efficiency in AI applications.


News Mar 13, 2020 by Luke James
Synopsys and NSITEXE Partnership Finds Success with Accelerated Processor SoC Development

Synopsys and NSITEXE Partnership Finds Success with Accelerated Processor SoC Development

NSITEXE utilizes Synopsys’ development tools and IP to build a SoC (system-on-a-chip) for autonomous driving.


News Sep 09, 2019 by Gary Elinoff
Design Implementation in the Xilinx Vivado Design Suite

Design Implementation in the Xilinx Vivado Design Suite

This article will look at the techniques that Vivado employs to accelerate design implementation.


News Sep 07, 2018 by Dr. Steve Arar
FPGA Design Software: An Overview of Time-to-Integration Features in Xilinx’s Vivado Design Suite

FPGA Design Software: An Overview of Time-to-Integration Features in Xilinx’s Vivado Design Suite

This article will look at some of the most important features of the Xilinx Vivado Design Suite which accelerates the "time to integration" of the design procedure.


News Aug 24, 2018 by Dr. Steve Arar
SiFive Announces Open Source-Focused SoC Development Platform Based on RISC-V and NVDLA

SiFive Announces Open Source-Focused SoC Development Platform Based on RISC-V and NVDLA

SiFive announces an open-source SoC platform based on RISC-V and NVDLA architectures.


News Aug 21, 2018 by Bridgette Stone
Engineer Spotlight: Shafy Eltoukhy, Head of SiFive’s DesignShare Program

Engineer Spotlight: Shafy Eltoukhy, Head of SiFive’s DesignShare Program

AAC writer, Chantelle Dubois, had a chance to speak one-on-one with the head of SiFive's DesignShare program about the benefits to IP sharing, and what he believes will be important for the future of SoC design.


News Dec 21, 2017 by Chantelle Dubois
Intel to Introduce New CPU-FPGA Hybrid Chip Supported by Acceleration Stack

Intel to Introduce New CPU-FPGA Hybrid Chip Supported by Acceleration Stack

Last year, Intel acquired FPGA-focused Altera. Now they've announced the intention to create a hybrid between their well-known CPUs and FPGAs.Last year, Intel acquired FPGA-focused Altera. Now they've announced a new line of hybrid chips that combine FPGAs with their well-known CPUs, achieving a goal set in 2010.


News Oct 18, 2017 by Chantelle Dubois
Cadence to Unveil New Design Solutions at TSMC 2016

Cadence to Unveil New Design Solutions at TSMC 2016

Cadence Design Systems will be dropping the curtain on some exciting new technology solutions this year at TSMC 2016 in San Jose on March 15th.


News Mar 11, 2016 by Aaron LaBarbera
The Best FPGA Development Boards for New Designers

The Best FPGA Development Boards for New Designers

Here's a rundown of three boards best suited for beginning to intermediate FPGA designers. Some boards cost thousands of dollars, and it’s unrealistic to compare a board of that cost to a board that a hobbyist would likely choose, so this comparison looks at three popular boards in the sub-$90 price point.


News Nov 30, 2015 by Jennifer A. Diffley
Intel to Acquire Altera for $17 Billion

Intel to Acquire Altera for $17 Billion

The acquisition will couple Intel’s leading-edge products and manufacturing process with Altera’s leading field-programmable gate array (FPGA) technology. The combination is expected to enable new classes of products that meet customer needs in the data center and Internet of Things (IoT) market segments. Intel plans to offer Altera’s FPGA products with Intel Xeon® processors as highly customized, integrated products. The companies also expect to enhance Altera’s products through design and manufacturing improvements resulting from Intel’s integrated device manufacturing model.


News Jun 01, 2015 by Tim Youngblood