Representing a joint effort to accurately characterize the minerals present on the Earth’s surface, NASA’s JPL leverages optical and FPGA-based advances to…
Representing a joint effort to accurately characterize the minerals present on the Earth’s surface, NASA’s JPL leverages optical and FPGA-based advances to help in modeling the Earth’s climate.
Vehicles today operate on thousands of ICs. Here are three interesting chips that exemplify the diversity of automotive…
Vehicles today operate on thousands of ICs. Here are three interesting chips that exemplify the diversity of automotive technology.
For students back in college for their Fall semester—and anyone who needs a refresher—here’s the lowdown on our…
For students back in college for their Fall semester—and anyone who needs a refresher—here’s the lowdown on our top-notch textbooks, technical articles, and calculators for EE studies.
Aiming to ease the challenges of 5G Open RAN (O-RAN) system designs, CEVA has unveiled a baseband IP platform for 5G RAN ASICs.
Aiming to ease the challenges of 5G Open RAN (O-RAN) system designs, CEVA has unveiled a baseband IP platform for 5G RAN ASICs.
Microchip continues the push for RISC-V hardware by reaching milestones with its PolarFire system-on-a-chip (SoC)…
Microchip continues the push for RISC-V hardware by reaching milestones with its PolarFire system-on-a-chip (SoC) field-programmable gate array (FPGA) and Mi-V ecosystem.
Keen to free industrial robotics from the burdens of custom design, AMD has launched a SOM-based starter kit that puts…
Keen to free industrial robotics from the burdens of custom design, AMD has launched a SOM-based starter kit that puts ROS 2 and predefined interface apps into play.
Space, the "final frontier," has been a growing area of interest, especially for electronic devices. Companies like…
Space, the "final frontier," has been a growing area of interest, especially for electronic devices. Companies like Microchip, BAE Systems, Intel, CAES, and Lattice Semiconductor take aim for better space-rated IC design.
Industries like aerospace and defense are only raising the bar on IC requirements. Here are a few recently announced…
Industries like aerospace and defense are only raising the bar on IC requirements. Here are a few recently announced tools helping IC designers meet the task.
Seeing these advantages of using field programmable gate array (FPGA) technology, this week is Intel's FPGA Day, which…
Seeing these advantages of using field programmable gate array (FPGA) technology, this week is Intel's FPGA Day, which just announced a collab to further FPGA-based infrastructure processing units (IPUs).
The Cadence Integrity 3D-IC platform brings together a suite of advanced floor planning and validation software to…
The Cadence Integrity 3D-IC platform brings together a suite of advanced floor planning and validation software to develop 3D-stacked SoC designs.
In the nanometer era, IC complexity grows faster than die areas. EDA companies are stepping up with tools to streamline…
In the nanometer era, IC complexity grows faster than die areas. EDA companies are stepping up with tools to streamline physical verification.
Analysts predict that DDR5 will dominate the DRAM market in coming years. How do you calibrate DDR for peak memory performance?
Analysts predict that DDR5 will dominate the DRAM market in coming years. How do you calibrate DDR for peak memory performance?
The two RF powerhouses have teamed up to create a flexible radio platform that addresses 5G network design challenges.
The two RF powerhouses have teamed up to create a flexible radio platform that addresses 5G network design challenges.
One of the trickiest aspects of chip design is figuring out how to pack more circuitry into a smaller footprint while…
One of the trickiest aspects of chip design is figuring out how to pack more circuitry into a smaller footprint while maintaining power, speed, and energy efficiency.
Osaka University researchers have built a new device that can be customized by the user for maximum efficiency in AI applications.
Osaka University researchers have built a new device that can be customized by the user for maximum efficiency in AI applications.
NSITEXE utilizes Synopsys’ development tools and IP to build a SoC (system-on-a-chip) for autonomous driving.
NSITEXE utilizes Synopsys’ development tools and IP to build a SoC (system-on-a-chip) for autonomous driving.
This article will look at the techniques that Vivado employs to accelerate design implementation.
This article will look at the techniques that Vivado employs to accelerate design implementation.
This article will look at some of the most important features of the Xilinx Vivado Design Suite which accelerates the…
This article will look at some of the most important features of the Xilinx Vivado Design Suite which accelerates the "time to integration" of the design procedure.
SiFive announces an open-source SoC platform based on RISC-V and NVDLA architectures.
SiFive announces an open-source SoC platform based on RISC-V and NVDLA architectures.
AAC writer, Chantelle Dubois, had a chance to speak one-on-one with the head of SiFive's DesignShare program about the…
AAC writer, Chantelle Dubois, had a chance to speak one-on-one with the head of SiFive's DesignShare program about the benefits to IP sharing, and what he believes will be important for the future of SoC design.
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