Learn about the LPC5500 series of MCUs, including specs and features, available resources, and applications, which range from automated robots to industrial HMI.
Learn about the LPC5500 series of MCUs, including specs and features, available resources, and applications, which range from automated robots to industrial HMI.
Semiconductor manufacturing is a complex industry and small improvements anywhere in the process can make a big…
Semiconductor manufacturing is a complex industry and small improvements anywhere in the process can make a big difference to the bottom line. This article discusses the benefits of continually optimizing manufacturing for the semiconductor industry by introducing smart manufacturing solutions.
There is a challenge for SoC developers to find ways to navigate the demand of memory in their design. This article looks…
There is a challenge for SoC developers to find ways to navigate the demand of memory in their design. This article looks at how a fourth, or last-level, cache can provide a solution.
This article explores and provides answers to some common questions associated with CAN design and implementation…
This article explores and provides answers to some common questions associated with CAN design and implementation challenges — in particular, signal termination in CAN systems.
Manufacturing still takes a large portion of time in the electrical engineering cycle. This article discusses how…
Manufacturing still takes a large portion of time in the electrical engineering cycle. This article discusses how software-driven automation and the IIoT can help hasten the manufacturing process.
In this article, learn about INICnet and how it helps to solve the question of how designers can create a safe and…
In this article, learn about INICnet and how it helps to solve the question of how designers can create a safe and effective connectivity method for vehicles.
This article introduces trusted execution environments (TEEs), discussing ways these environments are currently being…
This article introduces trusted execution environments (TEEs), discussing ways these environments are currently being used and how they could be a security solution for connected cars.
In this article, Western Digital's Ted Marena explores the reasons companies have and the process they go through when…
In this article, Western Digital's Ted Marena explores the reasons companies have and the process they go through when integrating the open process instruction set architecture RISC-V.
This article looks at the safety standard that governs ADAS features and the challenge in designing power monitoring…
This article looks at the safety standard that governs ADAS features and the challenge in designing power monitoring systems to comply with this standard while introducing an automotive power monitor that has been certified to meet this standard.
RISC-V hardware offers additional security for IoT-connected embedded devices beyond software cybersecurity.
RISC-V hardware offers additional security for IoT-connected embedded devices beyond software cybersecurity.
The article discusses the benefits of a custom instruction for RISC-V and introduces the ACE framework.
The article discusses the benefits of a custom instruction for RISC-V and introduces the ACE framework.
This article introduces the RISC-V-based SweRV core, which builds on the classic five-stage RISC-V pipeline and allows up…
This article introduces the RISC-V-based SweRV core, which builds on the classic five-stage RISC-V pipeline and allows up to two instructions per clock cycle.
This application note describes an SLG46140V design that implements a 16-bit up/down counter with quadrature encoder…
This application note describes an SLG46140V design that implements a 16-bit up/down counter with quadrature encoder inputs. The GreenPAK device relieves the host of real-time input requirements and allows for easy connection of multiple encoders.
This application note describes a simple hardware implementation of a 4-Mux LCD driver using time division multiplexing…
This application note describes a simple hardware implementation of a 4-Mux LCD driver using time division multiplexing techniques along with system monitoring using a GreenPAK IC.
In this article, we explain how the use of open-source functional simulators like Antmicro’s Renode can be an integral…
In this article, we explain how the use of open-source functional simulators like Antmicro’s Renode can be an integral part of hardware-software co-design efforts.
This article discusses Foundries.io's microPlatforms which support Intel, Arm, and RISC-V architectures and are designed…
This article discusses Foundries.io's microPlatforms which support Intel, Arm, and RISC-V architectures and are designed to avoid lock-in to specific hardware implementations.
This article discusses the RISC-V-based SoC FPGA architecture for PolarFire SoC, which allows hard real-time applications…
This article discusses the RISC-V-based SoC FPGA architecture for PolarFire SoC, which allows hard real-time applications and Linux applications to coexist.
This article explores how RISC-V, combined with open-source collaboration and standards, is enabling innovation and…
This article explores how RISC-V, combined with open-source collaboration and standards, is enabling innovation and purpose-built technologies among software engineers, system architects, CTOs, and board designers. It also touches on the possible impact that RISC-V and open source trends could have on the future of data-centric application experiences.
Learn about CKB-virtual machine (VM), which is a RISC-V instruction set that utilizes RISC-V's open-source instruction…
Learn about CKB-virtual machine (VM), which is a RISC-V instruction set that utilizes RISC-V's open-source instruction set architecture.
In this article, the engineering team at Promwad examines hybrid memory cubes (HMCs), which can provide a 15-fold…
In this article, the engineering team at Promwad examines hybrid memory cubes (HMCs), which can provide a 15-fold increase in performance with up to a 70% energy savings per bit compared to DDR3 DRAM.