The article discusses the benefits of a custom instruction for RISC-V and introduces the ACE framework.
The article discusses the benefits of a custom instruction for RISC-V and introduces the ACE framework.
This article introduces the RISC-V-based SweRV core, which builds on the classic five-stage RISC-V pipeline and allows up…
This article introduces the RISC-V-based SweRV core, which builds on the classic five-stage RISC-V pipeline and allows up to two instructions per clock cycle.
In this article, we explain how the use of open-source functional simulators like Antmicro’s Renode can be an integral…
In this article, we explain how the use of open-source functional simulators like Antmicro’s Renode can be an integral part of hardware-software co-design efforts.
This article discusses the RISC-V-based SoC FPGA architecture for PolarFire SoC, which allows hard real-time applications…
This article discusses the RISC-V-based SoC FPGA architecture for PolarFire SoC, which allows hard real-time applications and Linux applications to coexist.
Learn about CKB-virtual machine (VM), which is a RISC-V instruction set that utilizes RISC-V's open-source instruction…
Learn about CKB-virtual machine (VM), which is a RISC-V instruction set that utilizes RISC-V's open-source instruction set architecture.
What is an ecosystem and what is not? How does the term ecosystem apply to RISC-V and it's open-source architecture?…
What is an ecosystem and what is not? How does the term ecosystem apply to RISC-V and it's open-source architecture? Markus Levy nad Robert Oshana weigh in on RISC-V as an ecosystem, where that ecosystem is today, and discusses new developments in RISC-V.
This article explores the pros and cons of either designing embedded systems from scratch or utilizing pre-made…
This article explores the pros and cons of either designing embedded systems from scratch or utilizing pre-made single-board computers.
This article provides an overview of what an IoT node needs for a faster and simpler implementation of robust security.
This article provides an overview of what an IoT node needs for a faster and simpler implementation of robust security.
This article discusses how designers can leverage a graphics library with a tightly-coupled graphics toolset to expedite…
This article discusses how designers can leverage a graphics library with a tightly-coupled graphics toolset to expedite GUI development in their projects.
Historically, FPGAs have been challenging to work with. To combat that reputation, Xilinx developed programmable devices…
Historically, FPGAs have been challenging to work with. To combat that reputation, Xilinx developed programmable devices that simplify—and accelerate—the implementation of customized hardware development.
SoCs with programmable logic are an essential element of real-time embedded vision systems. Designers can capitalize on…
SoCs with programmable logic are an essential element of real-time embedded vision systems. Designers can capitalize on the power and efficiency of Xilinx's Zynq Ultrascale+ MPSoC devices to implement their designs using Avnet's Embedded Vision Kits and the Xilinx reVISION stack.
MicroBlaze is a 32-bit soft RISC processor core, created to accelerate the development of cost-sensitive, high-volume…
MicroBlaze is a 32-bit soft RISC processor core, created to accelerate the development of cost-sensitive, high-volume applications that traditionally required one or more microcontrollers.
A critical factor in both Meltdown and Spectre lies in how the desire for speed can result in security issues.
A critical factor in both Meltdown and Spectre lies in how the desire for speed can result in security issues.
An exploration of how new mid-range FPGAs can perform bridging functions for Ethernet and Gigabit Ethernet (GbE) links…
An exploration of how new mid-range FPGAs can perform bridging functions for Ethernet and Gigabit Ethernet (GbE) links while addressing the issue of low power consumption.
In this Industry Article, Mark Forbes of Altium explores the problems, solutions, and safety standards surrounding…
In this Industry Article, Mark Forbes of Altium explores the problems, solutions, and safety standards surrounding autonomous vehicles.
In this multipart industrial IoT series, we will break down and explore the fundamental aspects of the edge node…
In this multipart industrial IoT series, we will break down and explore the fundamental aspects of the edge node interpretation within the larger IoT framework: sensing, measuring, interpreting, and connecting data, with additional consideration for power management and security.
This article takes a look at how current- or next-generation technologies can provide the potential for innovative…
This article takes a look at how current- or next-generation technologies can provide the potential for innovative applications and the problems and solutions that may arise.
Until recently, developers integrating a FPGA fabric with a microcontroller were severely limited in their choice of IP…
Until recently, developers integrating a FPGA fabric with a microcontroller were severely limited in their choice of IP licensing options. Using open-source tools with a RISC-V core in a FPGA is present a solution to that problem.
This article describes how a prototype for a basic smart home system can be designed using the Silego GreenPAK and the Blynk app.
This article describes how a prototype for a basic smart home system can be designed using the Silego GreenPAK and the Blynk app.
Optimizing performance, safety, and reliability in ADAS applications via design, verification, and processor IP and a…
Optimizing performance, safety, and reliability in ADAS applications via design, verification, and processor IP and a holistic design approach.