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NASA Taps SiFive’s RISC-V Core for its Spaceflight Processor

NASA Taps SiFive’s RISC-V Core for its Spaceflight Processor

NASA has selected SiFive’s X280 RISC-V device as the CPU core for its upcoming High-Performance Spaceflight Computer (HPSC) project.


News Sep 09, 2022 by Jake Hertz
RISC-V Universe Grows with New GPUs, CPUs, and Development Kits

RISC-V Universe Grows with New GPUs, CPUs, and Development Kits

More companies continue to leverage RISC-V, a free open source instruction set architecture, to push innovation in GPUs and real-time CPU devices.


News Aug 27, 2022 by Abdulwaliy Oyekunle
Amid Chip Shortages, Companies Bet on RISC-V

Amid Chip Shortages, Companies Bet on RISC-V

The RISC-V architecture continues to gather momentum as organizations make efforts to leverage the open-source ISA technology and innovate with new RISC-V solutions.


News Aug 24, 2022 by Lianne Frith
RISC-V Shines at Embedded World With New Specs and Processors

RISC-V Shines at Embedded World With New Specs and Processors

At Embedded World 2022 today, RISC-V activity heats up as RISC-V International reveals four new spec approvals and SiFive unveils a new version of its X280 processor.


News Jun 21, 2022 by Jeff Child
Automotive IC Solutions Roll for Enhanced Security and ADAS

Automotive IC Solutions Roll for Enhanced Security and ADAS

Next-gen automotive system design keeps getting more challenging. To help engineers keep pace, three chip vendors are serving up solutions aimed at enhanced security, ADAS, and simplified door control.


Highlights of Intel’s 2021 Architecture Day—a Computing-centric Event

Highlights of Intel’s 2021 Architecture Day—a Computing-centric Event

At Intel's 2021 Architecture Day, CEO Pat Gelsinger called the company's new computing technology "magic." Here are a few highlights from the event.


News Aug 24, 2021 by Jake Hertz
Marvell’s OCTEON 10: The First DPU To Use Neoverse N2 ARMv9 Architecture

Marvell’s OCTEON 10: The First DPU To Use Neoverse N2 ARMv9 Architecture

Marvell’s newest 5 nm data processing unit (DPU), the OCTEON 10, offers 3x improvement over the previous generation along with the newest ARMv9 Core.


News Jul 07, 2021 by Adrian Gibbons
A RISC-V Future? SiFive and Andes Aim to Shake Up the Processor Industry

A RISC-V Future? SiFive and Andes Aim to Shake Up the Processor Industry

RISC-V, the open-source instruction set architecture, is making inroads against industry giants, with the support of the RISC-V Foundation.


News Jun 25, 2021 by Adrian Gibbons
ARMv9: the Long-awaited High-Performance Computing Architecture

ARMv9: the Long-awaited High-Performance Computing Architecture

ARM Vision 2021 defines the company's roadmap for the next ten years of specialized computing with the ARMv9-A.


News Apr 01, 2021 by Adrian Gibbons
John von Neumann: From the Manhattan Project to the Princeton Architecture

John von Neumann: From the Manhattan Project to the Princeton Architecture

John von Neumann has revolutionized the world of computing through his work on the Manhattan Project, the von Neumann (Princeton) Architecture, and the first IAS computer.


News Feb 27, 2021 by Kimber Wymore
A New Multimodal Architecture Said to Redefine the Way Transistors Work

A New Multimodal Architecture Said to Redefine the Way Transistors Work

Researchers at the University of Surrey have come up with a new type of transistor that offers linear behavior and huge upside.


News Nov 02, 2020 by Jake Hertz
Ultrasound Receiver Architecture Undergoes a Seismic Shift

Ultrasound Receiver Architecture Undergoes a Seismic Shift

Ultrasound, with nearly a century of technological history, has seen its third major technological breakthrough coming out of North Carolina State.


News Aug 20, 2020 by Adrian Gibbons
SiFive, Co-Founder of RISC-V, Unveils Major Upgrades to RISC-V-Based Processors

SiFive, Co-Founder of RISC-V, Unveils Major Upgrades to RISC-V-Based Processors

As the co-founders of RISC-V, SiFive's level-up on processors could have significant implications for custom SoC design.


News Jul 25, 2020 by Vanessa Samuel
The International Telecommunication Union Announces a New Architecture That Incorporates MI Mechanisms

The International Telecommunication Union Announces a New Architecture That Incorporates MI Mechanisms

Recently, a study into the architecture has been presented by members of the Wireless Networking and AI&ML research groups and described as a “new standard” for telecommunications networks.


News May 21, 2020 by Luke James
COVID-19 Puts Spotlight on Open-Source RISC-V Cores, IP

COVID-19 Puts Spotlight on Open-Source RISC-V Cores, IP

Remote work during this pandemic has shed light anew on the virtues of RISC-V, which has just gotten more accessible.


Microchip Announces First RISC-V-based SoC FPGA to Use Half the Power of Other FPGAs

Microchip Announces First RISC-V-based SoC FPGA to Use Half the Power of Other FPGAs

Microchip's new RISC-V-based PolarFire SoC family is said to provide 50% lower power than competing mid-range FPGAs.


News Dec 10, 2019 by Lisa Boneta.
AI Hardware Built from a Software-first Perspective: Groq’s Flexible Silicon Architecture

AI Hardware Built from a Software-first Perspective: Groq’s Flexible Silicon Architecture

Groq, a semiconductor startup with software roots, has developed a new processing unit with a unique architecture that offers inference solutions for AI acceleration.


News Dec 03, 2019 by Majeed Ahmad
Alibaba’s Semiconductor Subsidiary Will Utilize Open-Source RISC-V Core

Alibaba’s Semiconductor Subsidiary Will Utilize Open-Source RISC-V Core

Alibaba is set to produce the next generation of Chinese processors with the RISC-V instead of Arm architecture.


News Jul 29, 2019 by Robin Mitchell
Arm Cortex-M Processors Get a Boost towards Machine Learning, DSP in the Age of IoT Edge Computing

Arm Cortex-M Processors Get a Boost towards Machine Learning, DSP in the Age of IoT Edge Computing

Can IoT devices handle edge processing for machine learning and DSP? Arm's newly-announced Helium vector extension for Cortex-M processors aims to facilitate more complex development on the edge.


News Feb 14, 2019 by Baker Lawley
Western Digital SweRVs Towards Open Source with New RISC-V Core, ISS, and Cache Coherency

Western Digital SweRVs Towards Open Source with New RISC-V Core, ISS, and Cache Coherency

Is open source changing the way we manage data? Western Digital, a data storage device company, switched to RISC-V's open-source ISA (instruction set architecture) a year ago. This month, they announced a series of open-source, collaborative initiatives that aim to make data more open, from processor cores to memory caches.


News Dec 18, 2018 by Kate Smith