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Moving Data Through an LTspice Parallel-Load Shift Register

Moving Data Through an LTspice Parallel-Load Shift Register

This article demonstrates the operation of an LTspice shift register and discusses details of its schematic and timing relationships.


InspireSemi Announces Tapeout of Thunderbird Accelerated Computing Chip

InspireSemi Announces Tapeout of Thunderbird Accelerated Computing Chip

InspireSemi’s new compute chip couples the parallel processing of GPUs with the versatility of CPUs.


News Jul 09, 2024 by Aaron Carman
Microchip Now Offers Full Microprocessor Spectrum, From 8- to 64-bit MPUs

Microchip Now Offers Full Microprocessor Spectrum, From 8- to 64-bit MPUs

With the ability to shift computing resources as needed, Microchip’s new 64-bit, RISC-V processors bring needed flexibility to embedded edge devices.


News Jul 09, 2024 by Aaron Carman
Creating a Parallel-Load Shift Register in LTspice

Creating a Parallel-Load Shift Register in LTspice

We explore the design and functionality of a digital shift register intended for use in mixed-signal circuit simulations.


Axelera AI Raises $68M for ‘World’s Most Powerful AIPU’ for the Edge

Axelera AI Raises $68M for ‘World’s Most Powerful AIPU’ for the Edge

The new funding will expand the company’s product offerings and align it with the generative AI movement.


News Jul 01, 2024 by Jake Hertz
RISC-V Summit Europe News—Processor IP, Verification Tools, and More

RISC-V Summit Europe News—Processor IP, Verification Tools, and More

At every point in the design process, RISC-V developers can make use of the advancements presented at RISC-V Summit Europe.


News Jun 26, 2024 by Aaron Carman
Tiny But Mighty: Ceva Reveals New NPUs for Tiny Machine Learning Devices

Tiny But Mighty: Ceva Reveals New NPUs for Tiny Machine Learning Devices

The new neural processing unit is designed for edge AI applications that require targeted machine learning in resource-constrained settings.


News Jun 26, 2024 by Duane Benson
A Q&A With GlobalFoundries’ Vikas Gupta: With Silicon Photonics, Data Centers Can Shoulder AI

A Q&A With GlobalFoundries’ Vikas Gupta: With Silicon Photonics, Data Centers Can Shoulder AI

In this exclusive interview, GlobalFoundries representative Vikas Gupta discussed the advantages of silicon photonics for developing efficient AI chips.


News Jun 25, 2024 by Ingrid Fadelli
NXP Adds to AI Automotive Portfolio With Audio Processing DSP Chips

NXP Adds to AI Automotive Portfolio With Audio Processing DSP Chips

The chip family promises to deliver a significant upgrade to automotive infotainment systems.


News Jun 25, 2024 by Duane Benson
Modifying the Operation of Digital Components in LTspice

Modifying the Operation of Digital Components in LTspice

Customizing the device parameters of LTspice's logic gates and flip-flops can help you more accurately simulate these components. This article walks through the specification process and provides some helpful tips.


Companies Rally RISC-V Support for AI and HPC Applications

Companies Rally RISC-V Support for AI and HPC Applications

As RISC-V gains traction as an open-source alternative to Arm, several companies have announced partnerships and research to bolster the ISA.


News Jun 20, 2024 by Arjun Nijhawan
Alphawave Reveals Multiprotocol I/O Chiplet Tapeout, Collabs with Arm, Samsung

Alphawave Reveals Multiprotocol I/O Chiplet Tapeout, Collabs with Arm, Samsung

A string of new announcements has catapulted Alphawave Semi into the industry’s spotlight.


News Jun 19, 2024 by Jake Hertz
An Introduction to Using Logic Gates in LTspice

An Introduction to Using Logic Gates in LTspice

This article explains how to successfully integrate logic gates into an LTspice simulation.


Raspberry Pi’s New Entry-Level AI Kit Leverages Hailo Accelerators

Raspberry Pi’s New Entry-Level AI Kit Leverages Hailo Accelerators

Raspberry Pi has adopted Hailo's edge AI processors as an add-on, giving creators an accessible way to bring AI to their projects.


News Jun 11, 2024 by Darshil Patel
Gordon Bell, the Master Architect of Personal Computers, Dies at 89

Gordon Bell, the Master Architect of Personal Computers, Dies at 89

Gordon Bell, known by many peers as the father of computer architecture, defined the classification framework for the computer industry and helped design the first minicomputers.


News Jun 10, 2024 by Duane Benson
Simulating MOSFET Current-Voltage Characteristics Using Advanced SPICE Models

Simulating MOSFET Current-Voltage Characteristics Using Advanced SPICE Models

In this article, we use a SPICE model for 90 nm CMOS to plot key electrical relationships of an NMOS transistor.


Nvidia, Qualcomm, and MediaTek Showcase AI Processors at Computex 2024

Nvidia, Qualcomm, and MediaTek Showcase AI Processors at Computex 2024

Targeting devices ranging from laptops to smart TVs, the newest computing processors bring dedicated AI hardware to varied applications.


News Jun 07, 2024 by Aaron Carman
Intel Makes Way for the AI PC Era With New Lunar Lake Architecture

Intel Makes Way for the AI PC Era With New Lunar Lake Architecture

Intel has adopted a new SoC design that triples the size and quadruples the performance of its AI accelerator.


News Jun 06, 2024 by Jake Hertz
Speeding Derivative SoC Designs With Networks-on-Chips

Speeding Derivative SoC Designs With Networks-on-Chips

With the help of a case study, we examine how adopting NoC technology can significantly improve the process of updating existing chip designs.


Using Advanced SPICE models to Characterize an NMOS Transistor

Using Advanced SPICE models to Characterize an NMOS Transistor

SPICE models designed for specific CMOS process nodes can enhance simulations of integrated-circuit transistors. Learn where to find these models and how to use them.