The Core-V Chassis evaluation SoC will feature a CV64A 64-bit core and a CV32E 32-bit coprocessor core as well as 3D and 2D GPUs.
The Core-V Chassis evaluation SoC will feature a CV64A 64-bit core and a CV32E 32-bit coprocessor core as well as 3D and 2D GPUs.
Microchip's new RISC-V-based PolarFire SoC family is said to provide 50% lower power than competing mid-range FPGAs.
Microchip's new RISC-V-based PolarFire SoC family is said to provide 50% lower power than competing mid-range FPGAs.
Groq, a semiconductor startup with software roots, has developed a new processing unit with a unique architecture that…
Groq, a semiconductor startup with software roots, has developed a new processing unit with a unique architecture that offers inference solutions for AI acceleration.
Alibaba is set to produce the next generation of Chinese processors with the RISC-V instead of Arm architecture.
Alibaba is set to produce the next generation of Chinese processors with the RISC-V instead of Arm architecture.
Will open source hardware become as ubiquitous as open-source software, such as Linux and Android?
Will open source hardware become as ubiquitous as open-source software, such as Linux and Android?
These roadshows will showcase innovative RISC-V implementations from leading RISC innovators.
These roadshows will showcase innovative RISC-V implementations from leading RISC innovators.
Arm's new security certifications and IoT infrastructure platforms plan for one trillion connected devices.
Arm's new security certifications and IoT infrastructure platforms plan for one trillion connected devices.
Can IoT devices handle edge processing for machine learning and DSP? Arm's newly-announced Helium vector extension for…
Can IoT devices handle edge processing for machine learning and DSP? Arm's newly-announced Helium vector extension for Cortex-M processors aims to facilitate more complex development on the edge.
Is open source changing the way we manage data? Western Digital, a data storage device company, switched to RISC-V's…
Is open source changing the way we manage data? Western Digital, a data storage device company, switched to RISC-V's open-source ISA (instruction set architecture) a year ago. This month, they announced a series of open-source, collaborative initiatives that aim to make data more open, from processor cores to memory caches.
After 12 years in the making, the computer designed to work like a human brain, at the University of Manchester is…
After 12 years in the making, the computer designed to work like a human brain, at the University of Manchester is finally switched on. What does this computer do? How is it made? And who is Steve Furber?
SiFive announces an open-source SoC platform based on RISC-V and NVDLA architectures.
SiFive announces an open-source SoC platform based on RISC-V and NVDLA architectures.
Continuing our series on the Instruction Set Architecture (ISA), this week we delve into the PowerPC ISA.
Continuing our series on the Instruction Set Architecture (ISA), this week we delve into the PowerPC ISA.
ISAs come in several different flavours. Many are proprietary (think AMD), while others are paving the way for open…
ISAs come in several different flavours. Many are proprietary (think AMD), while others are paving the way for open source (think RISC-V). To help get a feel for what’s out there, here’s a brief primer on the history, evolution, and characteristics of a select few, starting with ISAs developed by Digital Equipment Corporation (DEC).
In the world of power, control monitoring is incredibly important for functional as well as safety reasons. And with the…
In the world of power, control monitoring is incredibly important for functional as well as safety reasons. And with the demand rising for GUIs in even the most basic products, it comes as no surprise that current microcontrollers are struggling to meet this demand. Microchip has announced its latest family of devices, the dsPIC33CH, that aims to tackle this!
AAC writer, Chantelle Dubois, had a chance to speak one-on-one with the head of SiFive's DesignShare program about the…
AAC writer, Chantelle Dubois, had a chance to speak one-on-one with the head of SiFive's DesignShare program about the benefits to IP sharing, and what he believes will be important for the future of SoC design.
The catalog of IPs includes security cores, Logic NVM technology, embedded analytics, and multicore debugging toolsets.
The catalog of IPs includes security cores, Logic NVM technology, embedded analytics, and multicore debugging toolsets.
SiFive, the company behind the first RISC-V based SoCs, has recently announced the addition of Flex Logix’s FPGA IP to…
SiFive, the company behind the first RISC-V based SoCs, has recently announced the addition of Flex Logix’s FPGA IP to its DesignShare initiative.
The RISC-V Foundation has continued to build on its momentum, announcing that this month the open-source ISA presence at…
The RISC-V Foundation has continued to build on its momentum, announcing that this month the open-source ISA presence at HOT CHIPS 29.
Open source hardware met open source instruction set architecture this month when SiFive announced the Arduino…
Open source hardware met open source instruction set architecture this month when SiFive announced the Arduino Cinque—an Arduino development board based off the RISC-V ISA.
Learn about RISC-V's challenges and competitors.
Learn about RISC-V's challenges and competitors.
Facebook
Google
GitHub
Linkedin