NASA has selected SiFive’s X280 RISC-V device as the CPU core for its upcoming High-Performance Spaceflight Computer (HPSC) project.
NASA has selected SiFive’s X280 RISC-V device as the CPU core for its upcoming High-Performance Spaceflight Computer (HPSC) project.
Setting out to enter the high-end processing niche within RISC-V, startup LeapFive has unveiled a quad-core 1.8 GHz RISC-V SoC.
Setting out to enter the high-end processing niche within RISC-V, startup LeapFive has unveiled a quad-core 1.8 GHz RISC-V SoC.
More companies continue to leverage RISC-V, a free open source instruction set architecture, to push innovation in GPUs…
More companies continue to leverage RISC-V, a free open source instruction set architecture, to push innovation in GPUs and real-time CPU devices.
The RISC-V architecture continues to gather momentum as organizations make efforts to leverage the open-source ISA…
The RISC-V architecture continues to gather momentum as organizations make efforts to leverage the open-source ISA technology and innovate with new RISC-V solutions.
A major player has joined the effort to build out the world’s largest and most successful open-source ISA.
A major player has joined the effort to build out the world’s largest and most successful open-source ISA.
RISC-V is often associated with embedded projects. Now, the open-source ISA may be a more common player in higher-end…
RISC-V is often associated with embedded projects. Now, the open-source ISA may be a more common player in higher-end computing markets.
RISC-V, the open-source instruction set architecture, is making inroads against industry giants, with the support of the…
RISC-V, the open-source instruction set architecture, is making inroads against industry giants, with the support of the RISC-V Foundation.
On the heels of RISC-V’s 10th birthday, let's explore the history of RISC-V from its inception to today.
On the heels of RISC-V’s 10th birthday, let's explore the history of RISC-V from its inception to today.
As the co-founders of RISC-V, SiFive's level-up on processors could have significant implications for custom SoC design.
As the co-founders of RISC-V, SiFive's level-up on processors could have significant implications for custom SoC design.
It all starts with firmware that runs a routing protocol, allowing routers to pay each other for bandwidth and automate…
It all starts with firmware that runs a routing protocol, allowing routers to pay each other for bandwidth and automate network configuration.
Remote work during this pandemic has shed light anew on the virtues of RISC-V, which has just gotten more accessible.
Remote work during this pandemic has shed light anew on the virtues of RISC-V, which has just gotten more accessible.
Microchip's new RISC-V-based PolarFire SoC family is said to provide 50% lower power than competing mid-range FPGAs.
Microchip's new RISC-V-based PolarFire SoC family is said to provide 50% lower power than competing mid-range FPGAs.
Will open source hardware become as ubiquitous as open-source software, such as Linux and Android?
Will open source hardware become as ubiquitous as open-source software, such as Linux and Android?
These roadshows will showcase innovative RISC-V implementations from leading RISC innovators.
These roadshows will showcase innovative RISC-V implementations from leading RISC innovators.
SiFive announces an open-source SoC platform based on RISC-V and NVDLA architectures.
SiFive announces an open-source SoC platform based on RISC-V and NVDLA architectures.
AAC writer, Chantelle Dubois, had a chance to speak one-on-one with the head of SiFive's DesignShare program about the…
AAC writer, Chantelle Dubois, had a chance to speak one-on-one with the head of SiFive's DesignShare program about the benefits to IP sharing, and what he believes will be important for the future of SoC design.
The catalog of IPs includes security cores, Logic NVM technology, embedded analytics, and multicore debugging toolsets.
The catalog of IPs includes security cores, Logic NVM technology, embedded analytics, and multicore debugging toolsets.
SiFive, the company behind the first RISC-V based SoCs, has recently announced the addition of Flex Logix’s FPGA IP to…
SiFive, the company behind the first RISC-V based SoCs, has recently announced the addition of Flex Logix’s FPGA IP to its DesignShare initiative.
The RISC-V Foundation has continued to build on its momentum, announcing that this month the open-source ISA presence at…
The RISC-V Foundation has continued to build on its momentum, announcing that this month the open-source ISA presence at HOT CHIPS 29.
Open source hardware met open source instruction set architecture this month when SiFive announced the Arduino…
Open source hardware met open source instruction set architecture this month when SiFive announced the Arduino Cinque—an Arduino development board based off the RISC-V ISA.