Latest FPGA Technical Articles

Customizing the device parameters of LTspice's logic gates and flip-flops can help you more accurately simulate these…

Customizing the device parameters of LTspice's logic gates and flip-flops can help you more accurately simulate these components. This article walks through the specification process and provides some helpful tips.

This article explains how to successfully integrate logic gates into an LTspice simulation.

This article explains how to successfully integrate logic gates into an LTspice simulation.

In this project we create an 8-bit arithmetic logic unit (ALU) in the VHDL language and run it on an Altera CPLD…

In this project we create an 8-bit arithmetic logic unit (ALU) in the VHDL language and run it on an Altera CPLD development board connected to a custom PCB with input switches and LED display.

Indispensable for modern electrical engineering, application-specific integrated circuits (ASICs) form a diverse group of…

Indispensable for modern electrical engineering, application-specific integrated circuits (ASICs) form a diverse group of integrated circuits (ICs) that help designers to optimize sophisticated electronic devices.

Follow three experiments that show the process of determining which kind of encoding suits a given FPGA.

Follow three experiments that show the process of determining which kind of encoding suits a given FPGA.

This article shows a comparison of the implementations that result from using binary, Gray, and one-hot encodings to…

This article shows a comparison of the implementations that result from using binary, Gray, and one-hot encodings to implement state machines in an FPGA. These encodings are often evaluated and applied by the synthesis and implementation tools, so it’s important to know why the software makes these decisions.

This article will teach you about the intersection between JTAG and Arm core devices, with special attention paid to the…

This article will teach you about the intersection between JTAG and Arm core devices, with special attention paid to the Arm Debug Interface or ADI.

Learn about the interfaces and connectors used to implement JTAG.

Learn about the interfaces and connectors used to implement JTAG.

In this article, we’re going to look at the test access state machine in detail and even see some pseudocode for a…

In this article, we’re going to look at the test access state machine in detail and even see some pseudocode for a simple JTAG interface.

In this article, we’re going to be talking about JTAG, the ubiquitous hardware tool used for testing, programming, and…

In this article, we’re going to be talking about JTAG, the ubiquitous hardware tool used for testing, programming, and debugging.

This F_EQ (or Frequent Engineering Question) covers the basics of a crucial topic: hardware description languages.

This F_EQ (or Frequent Engineering Question) covers the basics of a crucial topic: hardware description languages.

This article is the fourth of a series on microcontroller timers which discusses internal watchdogs.

This article is the fourth of a series on microcontroller timers which discusses internal watchdogs.

This article is the third of a series on microcontroller timers which describes the RTCs inside a microcontroller.

This article is the third of a series on microcontroller timers which describes the RTCs inside a microcontroller.

This article, the first in a series on “timer/counter” functions in microcontrollers, discusses periodic timers.

This article, the first in a series on “timer/counter” functions in microcontrollers, discusses periodic timers.

This article introduces the idea of concurrency and a mechanism that many computers provide for dealing with concurrency…

This article introduces the idea of concurrency and a mechanism that many computers provide for dealing with concurrency called interrupts.

This article shows how to initialize arrays in a C program with values from text files.

This article shows how to initialize arrays in a C program with values from text files.

Learn how to use code memory to free up RAM on your MCU.

Learn how to use code memory to free up RAM on your MCU.

This article will discuss how to implement a shift register in Verilog. The register described can be synthesized and…

This article will discuss how to implement a shift register in Verilog. The register described can be synthesized and downloaded to an FPGA for test in actual hardware.

This article will discuss the details of interfacing a basic 16x2 LCD module with an FPGA.

This article will discuss the details of interfacing a basic 16x2 LCD module with an FPGA.