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Bricking Proof: Designing Safety-Critical RTL for eFuse Controllers

Bricking Proof: Designing Safety-Critical RTL for eFuse Controllers

An RTL glitch in an eFuse controller can permanently brick costly silicon. This article covers defense-in-depth FSM design, redundant watchdogs, and formal SVA verification.


Three Ways to Accelerate Cell Layout in DTCO

Three Ways to Accelerate Cell Layout in DTCO

The device technology co-optimization (DTCO) methodology requires generating large numbers of layouts. This article introduces a few ways of speeding up this time-consuming process using automation.


Understanding the PDK Generation Process

Understanding the PDK Generation Process

In this article, we'll walk through the steps of generating a Process Design Kit (PDK) for digital standard cell libraries.


Moving Data Through an LTspice Parallel-Load Shift Register

Moving Data Through an LTspice Parallel-Load Shift Register

This article demonstrates the operation of an LTspice shift register and discusses details of its schematic and timing relationships.


Creating a Parallel-Load Shift Register in LTspice

Creating a Parallel-Load Shift Register in LTspice

We explore the design and functionality of a digital shift register intended for use in mixed-signal circuit simulations.


Modifying the Operation of Digital Components in LTspice

Modifying the Operation of Digital Components in LTspice

Customizing the device parameters of LTspice's logic gates and flip-flops can help you more accurately simulate these components. This article walks through the specification process and provides some helpful tips.


An Introduction to Using Logic Gates in LTspice

An Introduction to Using Logic Gates in LTspice

This article explains how to successfully integrate logic gates into an LTspice simulation.


Simulating MOSFET Current-Voltage Characteristics Using Advanced SPICE Models

Simulating MOSFET Current-Voltage Characteristics Using Advanced SPICE Models

In this article, we use a SPICE model for 90 nm CMOS to plot key electrical relationships of an NMOS transistor.


Simulating the Short-Circuit Power Dissipation of a CMOS Inverter

Simulating the Short-Circuit Power Dissipation of a CMOS Inverter

Current briefly flows through both transistors during logic-level transitions. This article explores the resulting power dissipation and provides some helpful LTspice tips for measuring current and power.


An Explanation of Undervoltage Lockout

An Explanation of Undervoltage Lockout

Learn how undervoltage lockout (UVLO) can protect semiconductor devices and electronic systems from potentially hazardous operation.


Analyzing Oscillator Frequency in an LTspice Negative Voltage Charge Pump

Analyzing Oscillator Frequency in an LTspice Negative Voltage Charge Pump

Continuing our in-depth look at a simple SPICE circuit that can generate a negative supply voltage, we’ll consider the effect of oscillator frequency on the system’s performance parameters.


What is an Application-specific Integrated Circuit (ASIC)?

What is an Application-specific Integrated Circuit (ASIC)?

Indispensable for modern electrical engineering, application-specific integrated circuits (ASICs) form a diverse group of integrated circuits (ICs) that help designers to optimize sophisticated electronic devices.


Offset and Gain Calibration Functions in Precision ADCs: Self-calibration

Offset and Gain Calibration Functions in Precision ADCs: Self-calibration

Learn about the self-calibration or internal calibration function in an analog-to-digital converter (ADC).


An Introduction to RISC-V—Understanding RISC’s Open ISA

An Introduction to RISC-V—Understanding RISC’s Open ISA

This article is a primer into the basics of RISC-V. The open architecture philosophy is exposed, along with a technical description of the modular ISA, and some commercial RISC-V microprocessor implementations.


AXI Interconnects Tutorial: Multiple AXI Masters and Slaves in Digital Logic

AXI Interconnects Tutorial: Multiple AXI Masters and Slaves in Digital Logic

This article will explore AXI interconnects, the digital logic that allows multiple AXI masters and AXI slaves to communicate.


Obtaining Convergence for High-Q XTAL Oscillators

Obtaining Convergence for High-Q XTAL Oscillators

Learn a method of attaining convergence when simulating very high Q crystal oscillators using Cadence’s Virtuoso Periodic Steady State (PSS) analysis.


IC Design Resources Roundup: Mentor, Cadence, and Synopsys

IC Design Resources Roundup: Mentor, Cadence, and Synopsys

The design of a modern IC is a truly monumental undertaking, and IC design tools make the job possible.


Miller Frequency Compensation: How to Use Miller Capacitance for Op-Amp Compensation

Miller Frequency Compensation: How to Use Miller Capacitance for Op-Amp Compensation

Miller capacitance is commonly used in a method for operational amplifier frequency compensation.


Shunt Capacitance Compensation in Operational Amplifiers

Shunt Capacitance Compensation in Operational Amplifiers

In this article, we'll discuss how shunt capacitance can be used to achieve frequency compensation in op-amps and we'll also see why this is not the preferred technique.


Learn Analog Circuits: Types and Applications of Current Mirrors

Learn Analog Circuits: Types and Applications of Current Mirrors

The current mirror is an important analog building block that finds application in such diverse areas as DC biasing and current-mode signal processing.