This article will discuss the Xilinx Period timing constraint that allows us to describe the characteristics of the clock signal that will be used with an FPGA design.
December 05, 2018 by Dr. Steve Arar
This article describes an Ethernet-connected subsystem of a larger modular sensor system designed for industrial or smart home sensing and monitoring. We will discuss a custom sensor subsystem developed for this application.
September 12, 2018 by Mark Hughes