Digital ICs Technical Articles

This article will review the common FPGA resources that allow us to efficiently generate and distribute clock signals throughout a system....

This article will try to develop a better insight into wave reflection that can occur when driving a relatively long wire with a fast logic gate....

This article explores some important details related to the design and functionality of processors.

Learn about a hardware-based approach to performing calculations, routing digital signals, and controlling embedded systems using programmable logic and FPGAs....

This article will look at some of the consequences of adding a reset input to an FPGA design.

This article examines some subtle details associated with the high-frequency performance of decoupling capacitors.

This article explores the somewhat complicated issue of how exactly to connect a decoupling capacitor to a power pin.

Optocouplers are undoubtedly effective, but alternative isolation technologies may be a better choice for your application.

This article will review the operation of a basic ECL inverter/buffer, and then we’ll look at some of the most important features of this logic family....

In this article, we’ll discuss implementing a simple direct digital synthesizer (DDS) using the Xilinx System Generator.

This article will discuss phase truncation in direct digital synthesizers.

This article discusses the good and the bad regarding Schmitt Trigger RC oscillators. These oscillators are especially important because they are present in the internal oscillator in many...

This article will review two pipelined structures to implement a high throughput FIR filter.

This article will review considerations for efficient FPGA implementation of symmetric FIR filters.

This article will review the distributed arithmetic which is an interesting method of efficiently implementing multiply-and-accumulate operations....

This article will review a basic algorithm for binary division.

This article will review integrating a Xilinx IP core into an FPGA design.

This article will review the structure of the binary multipliers that use the look-up tables (LUTs) in the Xilinx logic fabric.

This tech brief provides an overview of a somewhat uncommon member of the flip-flop family.