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Digital ICs Technical Articles
Test & Measurement
Pipelined Direct Form FIR Versus the Transposed Structure
This article will review two pipelined structures to implement a high throughput FIR filter.
18 hours ago
Considerations for FPGA Implementation of Linear-Phase FIR Filters
This article will review considerations for efficient FPGA implementation of symmetric FIR filters.
4 days ago
Introduction to Distributed Arithmetic
This article will review the distributed arithmetic which is an interesting method of efficiently implementing multiply-and-accumulate operations....
May 11, 2018
Basic Binary Division: The Algorithm and the VHDL Code
This article will review a basic algorithm for binary division.
May 09, 2018
Use the Xilinx CORDIC Core to Easily Generate Sine and Cosine Functions
This article will review integrating a Xilinx IP core into an FPGA design.
May 02, 2018
How Does Xilinx Use Its Logic Fabric to Implement Efficient Multipliers?
This article will review the structure of the binary multipliers that use the look-up tables (LUTs) in the Xilinx logic fabric.
April 30, 2018
T Is for Toggle: Understanding the T Flip-Flop
This tech brief provides an overview of a somewhat uncommon member of the flip-flop family.
April 17, 2018
How to Use Carry-Save Adders to Efficiently Implement Multioperand Addition
This article reviews the use of carry-save adders to efficiently compute a multioperand addition.
April 13, 2018
How to Use VHDL Components to Create a Neat Hierarchical Design
This article defines VHDL components, describes component declaration, and gives examples of how to use VHDL components in your code. It also touches on the "for-generate" statement and its...
April 06, 2018
How to Write the VHDL Description of a Simple Algorithm: The Control Path
This article will review converting a simple algorithm into a VHDL description.
March 16, 2018
How to Write the VHDL Description of a Simple Algorithm: The Data Path
In this article, you'll learn how to write the VHDL code for a simple algorithm.
March 15, 2018
How to Reduce Power Consumption with Clock Gating
This article will discuss the basic concepts of clock gating and how it can be used to reduce the power consumption of synchronous digital systems....
March 08, 2018
Encoding the States of a Finite State Machine in VHDL
This article will review different encoding methods that can be used to implement the states of an FSM.
March 05, 2018
Incomplete If Statements and Latch Inference in VHDL
In this article, we’ll see that a memory element can be unintentionally inferred from an incomplete “if” statement.
February 23, 2018
Sequential VHDL: If and Case Statements
This article will review two important sequential statements in VHDL, namely “if” and “case” statements.
February 21, 2018
The Why and How of Pipelining in FPGAs
This article explains pipelining and its implications with respect to FPGAs, i.e., latency, throughput, change in operating frequency, and resource utilization....
February 15, 2018
The Variable: A Valuable Object in Sequential VHDL
This article will discuss the important features of variables in VHDL.
February 14, 2018
Introduction to Sequential VHDL Statements
This article will try to develop a better understanding of the sequential statement’s importance in VHDL.
February 09, 2018
Review of VHDL Signed/Unsigned Data Types
This article will review the “signed”/“unsigned” data types.
February 01, 2018
Integer and Its Subtypes in VHDL
This article will discuss the VHDL integer data type.
January 29, 2018
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