Latest IC Design Technical Articles

In this article, we'll learn about several key applications of PLLs in communication systems, including tracking filters,…

In this article, we'll learn about several key applications of PLLs in communication systems, including tracking filters, frequency and phase modulation, and FM and AM demodulation.

In this article, we explore when to choose a Class AB or Class D output stage for your piezo amplifier design. We'll also…

In this article, we explore when to choose a Class AB or Class D output stage for your piezo amplifier design. We'll also examine the Class D stage's power supply requirements.

The Hogge phase detector plays multiple roles in CDR circuits. In this article, we'll explore the Hogge detector's…

The Hogge phase detector plays multiple roles in CDR circuits. In this article, we'll explore the Hogge detector's behavior, highlight its main drawbacks, and introduce a different configuration that addresses them.

In this article, we explore the operation of a Class D stage with a capacitive load and how it can be used in piezo…

In this article, we explore the operation of a Class D stage with a capacitive load and how it can be used in piezo amplifier design.

Learn how the Hogge detector addresses the challenges of clock and data recovery (CDR) for data signals with limited…

Learn how the Hogge detector addresses the challenges of clock and data recovery (CDR) for data signals with limited clock information.

We examine the basic requirements of piezoelectric amplifiers and how Class AB operation can meet them.

We examine the basic requirements of piezoelectric amplifiers and how Class AB operation can meet them.

Learn how PLLs enable communication in which a clock signal is not transmitted with the data. We’ll look specifically…

Learn how PLLs enable communication in which a clock signal is not transmitted with the data. We’ll look specifically at return-to-zero (RZ) and non-return-to-zero (NRZ) data formats.

This article explains the importance of incorporating delay into the feedback path of a phase/frequency detector (PFD)…

This article explains the importance of incorporating delay into the feedback path of a phase/frequency detector (PFD) and examines its effect on performance.

Learn how using a phase/frequency detector (PFD) in place of a phase detector improves the acquisition range of a PLL.

Learn how using a phase/frequency detector (PFD) in place of a phase detector improves the acquisition range of a PLL.

Learn about this simple sequential phase detector and how it compares to the XOR gate. We'll also examine some key…

Learn about this simple sequential phase detector and how it compares to the XOR gate. We'll also examine some key limitations and circuit implementations.

This article explores the operation of the simplest digital phase detector: the exclusive-OR (XOR) gate.

This article explores the operation of the simplest digital phase detector: the exclusive-OR (XOR) gate.

To complete this project, we add backlight control and temperature-sensing functionality to the clock we built in the…

To complete this project, we add backlight control and temperature-sensing functionality to the clock we built in the previous installments.

We examine phase detectors that leverage either the nonlinear characteristics or switching capabilities of diodes to…

We examine phase detectors that leverage either the nonlinear characteristics or switching capabilities of diodes to perform multiplication.

We continue our design of a clock that uses analog ammeters to display time and temperature. In this installment, we…

We continue our design of a clock that uses analog ammeters to display time and temperature. In this installment, we examine the second of the two circuits that enable the timekeeping function.

This article explores the operation of the Gilbert-cell phase detector for both small and large signals.

This article explores the operation of the Gilbert-cell phase detector for both small and large signals.

The device technology co-optimization (DTCO) methodology requires generating large numbers of layouts. This article…

The device technology co-optimization (DTCO) methodology requires generating large numbers of layouts. This article introduces a few ways of speeding up this time-consuming process using automation.

This article explores the Gilbert cell, a widely used analog multiplier circuit.

This article explores the Gilbert cell, a widely used analog multiplier circuit.

Learn how to select the zero frequency, damping factor, and loop bandwidth for one of the most popular PLL configurations.

Learn how to select the zero frequency, damping factor, and loop bandwidth for one of the most popular PLL configurations.

In this article, we examine how adding a zero to the PLL loop filter affects the transient behavior and steady-state errors.

In this article, we examine how adding a zero to the PLL loop filter affects the transient behavior and steady-state errors.